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| author | Jason A. Donenfeld <Jason@zx2c4.com> | 2021-03-04 13:37:13 -0700 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2021-03-04 22:06:53 +0100 |
| commit | 196f3d586f11d96ba4ab60068cfb12420bcd20fd (patch) | |
| tree | 4f4eb9cd8c8a229972792286361b5bff8743d993 /target/linux/ipq806x/patches-5.4/093-4-v5.8-ipq806x-PCI-qcom-Use-bulk-clk-api-and-assert-on-error.patch | |
| parent | 1d412235a57f3359d1c7bb63bfebce50c56caee6 (diff) | |
| download | upstream-196f3d586f11d96ba4ab60068cfb12420bcd20fd.tar.gz upstream-196f3d586f11d96ba4ab60068cfb12420bcd20fd.tar.bz2 upstream-196f3d586f11d96ba4ab60068cfb12420bcd20fd.zip | |
kernel-5.4: bump to 5.4.102 and refresh patches
5.4.102 backported a lot of stuff that our WireGuard backport already
did, in addition to other patches we had, so those patches were
removed from that part of the series. In the process other patches were
refreshed or reworked to account for upstream changes.
This commit involved `update_kernel.sh -v -u 5.4`.
Cc: John Audia <graysky@archlinux.us>
Cc: David Bauer <mail@david-bauer.net>
Cc: Petr Štetiar <ynezz@true.cz>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Diffstat (limited to 'target/linux/ipq806x/patches-5.4/093-4-v5.8-ipq806x-PCI-qcom-Use-bulk-clk-api-and-assert-on-error.patch')
| -rw-r--r-- | target/linux/ipq806x/patches-5.4/093-4-v5.8-ipq806x-PCI-qcom-Use-bulk-clk-api-and-assert-on-error.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/ipq806x/patches-5.4/093-4-v5.8-ipq806x-PCI-qcom-Use-bulk-clk-api-and-assert-on-error.patch b/target/linux/ipq806x/patches-5.4/093-4-v5.8-ipq806x-PCI-qcom-Use-bulk-clk-api-and-assert-on-error.patch index 95531508b6..ecfcd74693 100644 --- a/target/linux/ipq806x/patches-5.4/093-4-v5.8-ipq806x-PCI-qcom-Use-bulk-clk-api-and-assert-on-error.patch +++ b/target/linux/ipq806x/patches-5.4/093-4-v5.8-ipq806x-PCI-qcom-Use-bulk-clk-api-and-assert-on-error.patch @@ -161,7 +161,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com> /* enable PCIe clocks and resets */ val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); -@@ -406,36 +393,6 @@ static int qcom_pcie_init_2_1_0(struct q +@@ -408,36 +395,6 @@ static int qcom_pcie_init_2_1_0(struct q val |= PHY_REFCLK_SSP_EN; writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK); @@ -198,7 +198,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com> /* wait for clock acquisition */ usleep_range(1000, 1500); -@@ -448,15 +405,19 @@ static int qcom_pcie_init_2_1_0(struct q +@@ -450,15 +407,19 @@ static int qcom_pcie_init_2_1_0(struct q return 0; |