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| author | Ansuel Smith <ansuelsmth@gmail.com> | 2020-01-26 04:47:49 +0100 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2020-03-03 23:38:23 +0100 |
| commit | 9a1ec4d3f4fca05275be28a6927b08c6cd43d97d (patch) | |
| tree | ddf65147d090e07fff02b2525852a2233f980bdb /target/linux/ipq806x/patches-5.4/0062-ipq806x-gcc-Added-the-enable-regs-and-mask-for-PRNG.patch | |
| parent | 8438ad26d985ef8d892d6ba33930470ed57080a1 (diff) | |
| download | upstream-9a1ec4d3f4fca05275be28a6927b08c6cd43d97d.tar.gz upstream-9a1ec4d3f4fca05275be28a6927b08c6cd43d97d.tar.bz2 upstream-9a1ec4d3f4fca05275be28a6927b08c6cd43d97d.zip | |
ipq806x: copy files to kernel 5.4
Copy files to kernel 5.4 to start porting.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Diffstat (limited to 'target/linux/ipq806x/patches-5.4/0062-ipq806x-gcc-Added-the-enable-regs-and-mask-for-PRNG.patch')
| -rw-r--r-- | target/linux/ipq806x/patches-5.4/0062-ipq806x-gcc-Added-the-enable-regs-and-mask-for-PRNG.patch | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches-5.4/0062-ipq806x-gcc-Added-the-enable-regs-and-mask-for-PRNG.patch b/target/linux/ipq806x/patches-5.4/0062-ipq806x-gcc-Added-the-enable-regs-and-mask-for-PRNG.patch new file mode 100644 index 0000000000..717934315a --- /dev/null +++ b/target/linux/ipq806x/patches-5.4/0062-ipq806x-gcc-Added-the-enable-regs-and-mask-for-PRNG.patch @@ -0,0 +1,25 @@ +From a16fcf911a020e46439a3bb3e702463fc3159831 Mon Sep 17 00:00:00 2001 +From: Abhishek Sahu <absahu@codeaurora.org> +Date: Wed, 18 Nov 2015 12:38:56 +0530 +Subject: [PATCH 62/69] ipq806x: gcc: Added the enable regs and mask for PRNG + +kernel got hanged while reading from /dev/hwrng at the +time of PRNG clock enable + +Change-Id: I89856c7e19e6639508e6a2774304583a3ec91172 +Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> +--- + drivers/clk/qcom/gcc-ipq806x.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/clk/qcom/gcc-ipq806x.c ++++ b/drivers/clk/qcom/gcc-ipq806x.c +@@ -1233,6 +1233,8 @@ static struct clk_rcg prng_src = { + .parent_map = gcc_pxo_pll8_map, + }, + .clkr = { ++ .enable_reg = 0x2e80, ++ .enable_mask = BIT(11), + .hw.init = &(struct clk_init_data){ + .name = "prng_src", + .parent_names = gcc_pxo_pll8, |