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authorShane Synan <digitalcircuit36939@gmail.com>2021-08-19 14:22:48 -0400
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>2021-08-21 23:54:31 +0200
commit9baca410644b3f0fe94e2d5b6558c9c4bf61e712 (patch)
tree74e5334746343fd6f113a15022f463143882ba2e /target/linux/ipq806x/patches-5.10
parentc23bc5032f7deb3615d4e8bddf37934f8252ab3e (diff)
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ipq806x: fix min<>target opp-microvolt DTS mixup
Rearrange all voltage triplets for "opp_table0" to match the specifications. "opp-microvolt" and "opp-microvolt-<name>" triplets are in order of <target min max>, and NOT <min target max>. Previously, the CPU would *always* spend its time at the "minimum" voltage, ignoring the actual intended target. This is a regression from previous behavior. On an NBG6817 with a Qualcomm CPU of PVS bin #2... (see &opp_table0 -> opp-1725000000 -> opp-microvolt-speed0-pvs2-v0) * Before: /usr/bin/tail -n +1 /sys/kernel/debug/opp/cpu0/opp\:1725000000/supply-0/u_volt_* ==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_max <== 1260000 ==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_min <== 1200000 ==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_target <== 1140000 * After: /usr/bin/tail -n +1 /sys/kernel/debug/opp/cpu0/opp\:1725000000/supply-0/u_volt_* ==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_max <== 1260000 ==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_min <== 1140000 ==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_target <== 1200000 To check voltages and frequencies at run time, use... /bin/cat /sys/kernel/debug/regulator/regulator_summary && /bin/cat /sys/kernel/debug/clk/clk_summary | grep "hfpll" See https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/Documentation/devicetree/bindings/opp/opp.txt?h=v5.4.142#n91 Fixes: 1e25423be8ac ("ipq806x: refresh dtsi patches") Signed-off-by: Shane Synan <digitalcircuit36939@gmail.com> Reviewed-by: Ansuel Smith <ansuelsmth@gmail.com> [commit message style cleanup, another kernel refresh] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/ipq806x/patches-5.10')
-rw-r--r--target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch71
-rw-r--r--target/linux/ipq806x/patches-5.10/103-ARM-dts-qcom-reduce-pci-IO-size-to-64K.patch6
-rw-r--r--target/linux/ipq806x/patches-5.10/851-add-gsbi1-dts.patch2
3 files changed, 41 insertions, 38 deletions
diff --git a/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch b/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch
index fac8b174d4..1ebce10600 100644
--- a/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch
+++ b/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch
@@ -26,7 +26,7 @@
};
cpu1: cpu@1 {
-@@ -38,14 +50,347 @@
+@@ -38,14 +50,350 @@
next-level-cache = <&L2>;
qcom,acc = <&acc1>;
qcom,saw = <&saw1>;
@@ -85,12 +85,15 @@
+ compatible = "operating-points-v2-kryo-cpu";
+ nvmem-cells = <&speedbin_efuse>;
+
++ /*
++ * Voltage thresholds are <target min max>
++ */
+ opp-384000000 {
+ opp-hz = /bits/ 64 <384000000>;
-+ opp-microvolt-speed0-pvs0-v0 = <950000 1000000 1050000>;
-+ opp-microvolt-speed0-pvs1-v0 = <878750 925000 971250>;
-+ opp-microvolt-speed0-pvs2-v0 = <831250 875000 918750>;
-+ opp-microvolt-speed0-pvs3-v0 = <760000 800000 840000>;
++ opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>;
++ opp-microvolt-speed0-pvs1-v0 = <925000 878750 971250>;
++ opp-microvolt-speed0-pvs2-v0 = <875000 831250 918750>;
++ opp-microvolt-speed0-pvs3-v0 = <800000 760000 840000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
+ opp-level = <0>;
@@ -98,10 +101,10 @@
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
-+ opp-microvolt-speed0-pvs0-v0 = <997500 1050000 1102500>;
-+ opp-microvolt-speed0-pvs1-v0 = <926250 975000 1023750>;
-+ opp-microvolt-speed0-pvs2-v0 = <878750 925000 971250>;
-+ opp-microvolt-speed0-pvs3-v0 = <807500 850000 892500>;
++ opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>;
++ opp-microvolt-speed0-pvs1-v0 = <975000 926250 1023750>;
++ opp-microvolt-speed0-pvs2-v0 = <925000 878750 971250>;
++ opp-microvolt-speed0-pvs3-v0 = <850000 807500 892500>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
+ opp-level = <1>;
@@ -109,10 +112,10 @@
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
-+ opp-microvolt-speed0-pvs0-v0 = <1045000 1100000 1155000>;
-+ opp-microvolt-speed0-pvs1-v0 = <973750 1025000 1076250>;
-+ opp-microvolt-speed0-pvs2-v0 = <945250 995000 1044750>;
-+ opp-microvolt-speed0-pvs3-v0 = <855000 900000 945000>;
++ opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>;
++ opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>;
++ opp-microvolt-speed0-pvs2-v0 = <995000 945250 1044750>;
++ opp-microvolt-speed0-pvs3-v0 = <900000 855000 945000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
+ opp-level = <1>;
@@ -120,10 +123,10 @@
+
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
-+ opp-microvolt-speed0-pvs0-v0 = <1092500 1150000 1207500>;
-+ opp-microvolt-speed0-pvs1-v0 = <1021250 1075000 1128750>;
-+ opp-microvolt-speed0-pvs2-v0 = <973750 1025000 1076250>;
-+ opp-microvolt-speed0-pvs3-v0 = <902500 950000 997500>;
++ opp-microvolt-speed0-pvs0-v0 = <1150000 1092500 1207500>;
++ opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>;
++ opp-microvolt-speed0-pvs2-v0 = <1025000 973750 1076250>;
++ opp-microvolt-speed0-pvs3-v0 = <950000 902500 997500>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
+ opp-level = <1>;
@@ -131,10 +134,10 @@
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
-+ opp-microvolt-speed0-pvs0-v0 = <1140000 1200000 1260000>;
-+ opp-microvolt-speed0-pvs1-v0 = <1068750 1125000 1181250>;
-+ opp-microvolt-speed0-pvs2-v0 = <1021250 1075000 1128750>;
-+ opp-microvolt-speed0-pvs3-v0 = <950000 1000000 1050000>;
++ opp-microvolt-speed0-pvs0-v0 = <1200000 1140000 1260000>;
++ opp-microvolt-speed0-pvs1-v0 = <1125000 1068750 1181250>;
++ opp-microvolt-speed0-pvs2-v0 = <1075000 1021250 1128750>;
++ opp-microvolt-speed0-pvs3-v0 = <1000000 950000 1050000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
+ opp-level = <2>;
@@ -142,10 +145,10 @@
+
+ opp-1400000000 {
+ opp-hz = /bits/ 64 <1400000000>;
-+ opp-microvolt-speed0-pvs0-v0 = <1187500 1250000 1312500>;
-+ opp-microvolt-speed0-pvs1-v0 = <1116250 1175000 1233750>;
-+ opp-microvolt-speed0-pvs2-v0 = <1068750 1125000 1181250>;
-+ opp-microvolt-speed0-pvs3-v0 = <997500 1050000 1102500>;
++ opp-microvolt-speed0-pvs0-v0 = <1250000 1187500 1312500>;
++ opp-microvolt-speed0-pvs1-v0 = <1175000 1116250 1233750>;
++ opp-microvolt-speed0-pvs2-v0 = <1125000 1068750 1181250>;
++ opp-microvolt-speed0-pvs3-v0 = <1050000 997500 1102500>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
+ opp-level = <2>;
@@ -377,7 +380,7 @@
memory {
device_type = "memory";
reg = <0x0 0x0>;
-@@ -93,6 +438,15 @@
+@@ -93,6 +441,15 @@
};
};
@@ -393,7 +396,7 @@
firmware {
scm {
compatible = "qcom,scm-ipq806x", "qcom,scm";
-@@ -120,6 +474,78 @@
+@@ -120,6 +477,78 @@
reg-names = "lpass-lpaif";
};
@@ -472,7 +475,7 @@
qcom_pinmux: pinmux@800000 {
compatible = "qcom,ipq8064-pinctrl";
reg = <0x800000 0x4000>;
-@@ -160,6 +586,15 @@
+@@ -160,6 +589,15 @@
};
};
@@ -488,7 +491,7 @@
spi_pins: spi_pins {
mux {
pins = "gpio18", "gpio19", "gpio21";
-@@ -169,6 +604,53 @@
+@@ -169,6 +607,53 @@
};
};
@@ -542,7 +545,7 @@
leds_pins: leds_pins {
mux {
pins = "gpio7", "gpio8", "gpio9",
-@@ -231,6 +713,17 @@
+@@ -231,6 +716,17 @@
clock-output-names = "acpu1_aux";
};
@@ -560,7 +563,7 @@
saw0: regulator@2089000 {
compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
-@@ -243,6 +736,17 @@
+@@ -243,6 +739,17 @@
regulator;
};
@@ -578,7 +581,7 @@
gsbi2: gsbi@12480000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <2>;
-@@ -478,6 +982,95 @@
+@@ -478,6 +985,95 @@
#reset-cells = <1>;
};
@@ -674,7 +677,7 @@
pcie0: pci@1b500000 {
compatible = "qcom,pcie-ipq8064";
reg = <0x1b500000 0x1000
-@@ -739,6 +1332,59 @@
+@@ -739,6 +1335,59 @@
status = "disabled";
};
@@ -734,7 +737,7 @@
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
regulator-name = "SDCC Power";
-@@ -814,4 +1460,17 @@
+@@ -814,4 +1463,17 @@
};
};
};
diff --git a/target/linux/ipq806x/patches-5.10/103-ARM-dts-qcom-reduce-pci-IO-size-to-64K.patch b/target/linux/ipq806x/patches-5.10/103-ARM-dts-qcom-reduce-pci-IO-size-to-64K.patch
index 050360ad21..4020d9d2de 100644
--- a/target/linux/ipq806x/patches-5.10/103-ARM-dts-qcom-reduce-pci-IO-size-to-64K.patch
+++ b/target/linux/ipq806x/patches-5.10/103-ARM-dts-qcom-reduce-pci-IO-size-to-64K.patch
@@ -17,7 +17,7 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -1085,7 +1085,7 @@
+@@ -1088,7 +1088,7 @@
#address-cells = <3>;
#size-cells = <2>;
@@ -26,7 +26,7 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-@@ -1136,7 +1136,7 @@
+@@ -1139,7 +1139,7 @@
#address-cells = <3>;
#size-cells = <2>;
@@ -35,7 +35,7 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
-@@ -1187,7 +1187,7 @@
+@@ -1190,7 +1190,7 @@
#address-cells = <3>;
#size-cells = <2>;
diff --git a/target/linux/ipq806x/patches-5.10/851-add-gsbi1-dts.patch b/target/linux/ipq806x/patches-5.10/851-add-gsbi1-dts.patch
index 3a83b2de30..e6ee9a93fc 100644
--- a/target/linux/ipq806x/patches-5.10/851-add-gsbi1-dts.patch
+++ b/target/linux/ipq806x/patches-5.10/851-add-gsbi1-dts.patch
@@ -1,6 +1,6 @@
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -747,6 +747,41 @@
+@@ -750,6 +750,41 @@
reg = <0x12100000 0x10000>;
};