diff options
| author | Matthew Hagan <mnhagan88@gmail.com> | 2021-05-13 21:49:43 +0100 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2021-11-28 17:51:52 +0100 |
| commit | 771691ec839b8e6925b5cd1d1a34a7ba67c0313f (patch) | |
| tree | f6298c6aac47b9e95132ce677db2b50cca94b5af /target/linux/ipq806x/patches-5.10/109-v5.15-arm-dts-qcom-add-ahb-reset-to-ipq806x-gmac.patch | |
| parent | cef420e8f75206725d94723e0b8a9d14f2a55a20 (diff) | |
| download | upstream-771691ec839b8e6925b5cd1d1a34a7ba67c0313f.tar.gz upstream-771691ec839b8e6925b5cd1d1a34a7ba67c0313f.tar.bz2 upstream-771691ec839b8e6925b5cd1d1a34a7ba67c0313f.zip | |
ipq806x: backport GMAC_AHB_RESET deassert patches
Add backports of the following patches:
"net: stmmac: explicitly deassert GMAC_AHB_RESET" and
"ARM: dts: qcom: add ahb reset to ipq806x-gmac"
Required for Meraki MR42/MR52.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Diffstat (limited to 'target/linux/ipq806x/patches-5.10/109-v5.15-arm-dts-qcom-add-ahb-reset-to-ipq806x-gmac.patch')
| -rw-r--r-- | target/linux/ipq806x/patches-5.10/109-v5.15-arm-dts-qcom-add-ahb-reset-to-ipq806x-gmac.patch | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches-5.10/109-v5.15-arm-dts-qcom-add-ahb-reset-to-ipq806x-gmac.patch b/target/linux/ipq806x/patches-5.10/109-v5.15-arm-dts-qcom-add-ahb-reset-to-ipq806x-gmac.patch new file mode 100644 index 0000000000..4a047ed6eb --- /dev/null +++ b/target/linux/ipq806x/patches-5.10/109-v5.15-arm-dts-qcom-add-ahb-reset-to-ipq806x-gmac.patch @@ -0,0 +1,64 @@ +From f95c4c56d65225a537a2d88735fde7ec4d37641d Mon Sep 17 00:00:00 2001 +From: Matthew Hagan <mnhagan88@gmail.com> +Date: Sat, 5 Jun 2021 18:35:38 +0100 +Subject: ARM: dts: qcom: add ahb reset to ipq806x-gmac + +Add GMAC_AHB_RESET to the resets property of each gmac node. + +Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> +Link: https://lore.kernel.org/r/20210605173546.4102455-2-mnhagan88@gmail.com +Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> +--- + arch/arm/boot/dts/qcom-ipq8064.dtsi | 20 ++++++++++++-------- + 1 file changed, 12 insertions(+), 8 deletions(-) + +--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +@@ -1335,8 +1335,9 @@ + clocks = <&gcc GMAC_CORE1_CLK>; + clock-names = "stmmaceth"; + +- resets = <&gcc GMAC_CORE1_RESET>; +- reset-names = "stmmaceth"; ++ resets = <&gcc GMAC_CORE1_RESET>, ++ <&gcc GMAC_AHB_RESET>; ++ reset-names = "stmmaceth", "ahb"; + + status = "disabled"; + }; +@@ -1358,8 +1359,9 @@ + clocks = <&gcc GMAC_CORE2_CLK>; + clock-names = "stmmaceth"; + +- resets = <&gcc GMAC_CORE2_RESET>; +- reset-names = "stmmaceth"; ++ resets = <&gcc GMAC_CORE2_RESET>, ++ <&gcc GMAC_AHB_RESET>; ++ reset-names = "stmmaceth", "ahb"; + + status = "disabled"; + }; +@@ -1381,8 +1383,9 @@ + clocks = <&gcc GMAC_CORE3_CLK>; + clock-names = "stmmaceth"; + +- resets = <&gcc GMAC_CORE3_RESET>; +- reset-names = "stmmaceth"; ++ resets = <&gcc GMAC_CORE3_RESET>, ++ <&gcc GMAC_AHB_RESET>; ++ reset-names = "stmmaceth", "ahb"; + + status = "disabled"; + }; +@@ -1404,8 +1407,9 @@ + clocks = <&gcc GMAC_CORE4_CLK>; + clock-names = "stmmaceth"; + +- resets = <&gcc GMAC_CORE4_RESET>; +- reset-names = "stmmaceth"; ++ resets = <&gcc GMAC_CORE4_RESET>, ++ <&gcc GMAC_AHB_RESET>; ++ reset-names = "stmmaceth", "ahb"; + + status = "disabled"; + }; |