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authorAnsuel Smith <ansuelsmth@gmail.com>2021-03-03 23:01:37 +0100
committerPetr Štetiar <ynezz@true.cz>2021-05-07 07:05:16 +0200
commitdb2c147cf47b12894aa0c6b49efcdd1eb199aed5 (patch)
treee387e6d974e531f73b3430a046734d4e2b4a28d1 /target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch
parentd079c8fa48995a64ce56c1d01cf008118e999a81 (diff)
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ipq806x: refresh 5.10 patches
make target/linux/kernel refresh Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Diffstat (limited to 'target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch')
-rw-r--r--target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch29
1 files changed, 11 insertions, 18 deletions
diff --git a/target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch b/target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch
index 9c16ee4351..b6e8e915eb 100644
--- a/target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch
+++ b/target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch
@@ -1,6 +1,6 @@
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -20,9 +20,9 @@
+@@ -20,7 +20,7 @@
#address-cells = <1>;
#size-cells = <0>;
@@ -9,9 +9,7 @@
compatible = "qcom,krait";
enable-method = "qcom,kpss-acc-v1";
device_type = "cpu";
- reg = <1>;
- next-level-cache = <&L2>;
-@@ -30,9 +30,9 @@
+@@ -30,7 +30,7 @@
qcom,saw = <&saw0>;
};
@@ -20,8 +18,6 @@
compatible = "qcom,krait";
enable-method = "qcom,kpss-acc-v1";
device_type = "cpu";
- reg = <1>;
- next-level-cache = <&L2>;
@@ -67,7 +67,7 @@
no-map;
};
@@ -39,7 +35,7 @@
#interrupt-cells = <2>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
-@@ -155,6 +155,7 @@
+@@ -155,6 +156,7 @@
function = "pcie3_rst";
drive-strength = <12>;
bias-disable;
@@ -47,7 +43,7 @@
};
};
-@@ -190,6 +190,7 @@
+@@ -190,6 +192,7 @@
intc: interrupt-controller@2000000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
@@ -55,7 +51,7 @@
#interrupt-cells = <3>;
reg = <0x02000000 0x1000>,
<0x02002000 0x1000>;
-@@ -219,21 +220,23 @@
+@@ -219,21 +222,23 @@
acc0: clock-controller@2088000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
@@ -81,7 +77,7 @@
reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
regulator;
};
-@@ -251,7 +254,7 @@
+@@ -251,7 +256,7 @@
syscon-tcsr = <&tcsr>;
@@ -90,7 +86,7 @@
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x12490000 0x1000>,
<0x12480000 0x1000>;
-@@ -326,7 +329,7 @@
+@@ -326,7 +331,7 @@
syscon-tcsr = <&tcsr>;
@@ -99,7 +95,7 @@
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x1a240000 0x1000>,
<0x1a200000 0x1000>;
-@@ -397,7 +400,7 @@
+@@ -397,7 +402,7 @@
status = "disabled";
};
@@ -108,7 +104,7 @@
compatible = "qcom,ipq806x-ahci", "generic-ahci";
reg = <0x29000000 0x180>;
-@@ -430,6 +430,16 @@ qfprom: qfprom@700000 {
+@@ -430,13 +435,35 @@
reg = <0x00700000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
@@ -125,9 +121,6 @@
};
gcc: clock-controller@900000 {
-@@ -437,9 +447,21 @@ gcc: clock-controller@900000 {
-
- gcc: clock-controller@900000 {
- compatible = "qcom,gcc-ipq8064";
+ compatible = "qcom,gcc-ipq8064", "syscon";
reg = <0x00900000 0x4000>;
@@ -148,7 +141,7 @@
};
tcsr: syscon@1a400000 {
-@@ -625,13 +629,13 @@
+@@ -740,13 +767,13 @@
qcom,ee = <0>;
};
@@ -165,7 +158,7 @@
status = "disabled";
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
-@@ -645,13 +649,12 @@
+@@ -760,13 +787,12 @@
non-removable;
cap-sd-highspeed;
cap-mmc-highspeed;