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author | Ram Chandra Jangir <rjangi@codeaurora.org> | 2016-05-21 14:48:31 +0530 |
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committer | John Crispin <john@phrozen.org> | 2016-05-27 15:50:17 +0200 |
commit | 5e49c5795697868f6317f17fda5a2b04f299e116 (patch) | |
tree | bf6ebcc54ae88fa08f268f02a8f118939fe6bf6a /target/linux/ipq806x/patches-4.4/710-watchdog-qcom-set-WDT_BARK_TIME-register-offset-to-o.patch | |
parent | 955c341d3bec0eb4971a03924e99156367255d7b (diff) | |
download | upstream-5e49c5795697868f6317f17fda5a2b04f299e116.tar.gz upstream-5e49c5795697868f6317f17fda5a2b04f299e116.tar.bz2 upstream-5e49c5795697868f6317f17fda5a2b04f299e116.zip |
ipq806x: Add support for linux-4.4
1)Changes
- Rebased the patches for linux-4.4.7
- Added patch to fix spi nor fifo and dma support
- Added patch to configure watchdog barktime
2)Testing
Tested on IPQ AP148 Board:
a. NOR boot and NAND boot
b. ethernet network and ath10k wifi
c. ubi sysupgrade
UnTested
dwc3 usb has not been validated on IPQ board(AP148)
3)Known Issues:
Once we flash ubi image on AP148, and if we reset the board, uboot on
first boot creates PEB and LEB for dynamic sized partitions, which is incorrect
and not what linux expects which causes errors when trying to mount rootfs.
In order to test this, we can use the below steps:
a. Flash the ubi image on board and don't reset the board
b. load the kernel fit image in RAM and boot from there.
Signed-off-by: Ram Chandra Jangir <rjangi@codeaurora.org>
Diffstat (limited to 'target/linux/ipq806x/patches-4.4/710-watchdog-qcom-set-WDT_BARK_TIME-register-offset-to-o.patch')
-rw-r--r-- | target/linux/ipq806x/patches-4.4/710-watchdog-qcom-set-WDT_BARK_TIME-register-offset-to-o.patch | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches-4.4/710-watchdog-qcom-set-WDT_BARK_TIME-register-offset-to-o.patch b/target/linux/ipq806x/patches-4.4/710-watchdog-qcom-set-WDT_BARK_TIME-register-offset-to-o.patch new file mode 100644 index 0000000000..7573c963a7 --- /dev/null +++ b/target/linux/ipq806x/patches-4.4/710-watchdog-qcom-set-WDT_BARK_TIME-register-offset-to-o.patch @@ -0,0 +1,43 @@ +From abc9f55079169806bcc31f29ec27f7df11c6184c Mon Sep 17 00:00:00 2001 +From: Ram Chandra Jangir <rjangi@codeaurora.org> +Date: Thu, 4 Feb 2016 12:41:56 +0530 +Subject: [PATCH 2/2] watchdog: qcom: set WDT_BARK_TIME register offset to one + second less of bite time + +Currently WDT_BARK_TIME register offset is not configured with bark +timeout during wdt_start,and it is taking bark timeout's default value. +For some versions of TZ (secure mode) will consider a BARK the same +as BITE and reset the board. + +So instead let's just configure the BARK time to be less than a second +of the bite timeout so the board does not reset in this scenario + +Change-Id: Ie09850ad7e0470ed721e6924911ca2a81fd9ff8a +Signed-off-by: Ram Chandra Jangir <rjangi@codeaurora.org> +--- + drivers/watchdog/qcom-wdt.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/watchdog/qcom-wdt.c b/drivers/watchdog/qcom-wdt.c +index 773dcfa..002274a 100644 +--- a/drivers/watchdog/qcom-wdt.c ++++ b/drivers/watchdog/qcom-wdt.c +@@ -22,6 +22,7 @@ + + #define WDT_RST 0x38 + #define WDT_EN 0x40 ++#define WDT_BARK_TIME 0x4C + #define WDT_BITE_TIME 0x5C + + struct qcom_wdt { +@@ -44,6 +45,7 @@ static int qcom_wdt_start(struct watchdog_device *wdd) + + writel(0, wdt->base + WDT_EN); + writel(1, wdt->base + WDT_RST); ++ writel((wdd->timeout - 1) * wdt->rate, wdt->base + WDT_BARK_TIME); + writel(wdd->timeout * wdt->rate, wdt->base + WDT_BITE_TIME); + writel(1, wdt->base + WDT_EN); + return 0; +-- +2.7.2 + |