diff options
author | Kevin Darbyshire-Bryant <kevin@darbyshire-bryant.me.uk> | 2016-11-21 18:18:47 +0000 |
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committer | John Crispin <john@phrozen.org> | 2016-11-29 21:12:08 +0100 |
commit | 102cb4742c14f78bf86b7d77c568c205f0d99d85 (patch) | |
tree | 3d7496977238f054a0b50416a299fdfcf1feb55d /target/linux/ipq806x/patches-4.4/096-05-usb-dwc3-Update-register-fields-for-SuperSpeedPlus.patch | |
parent | 882f4d2d63272abce8c1966983aa10178e2e971f (diff) | |
download | upstream-102cb4742c14f78bf86b7d77c568c205f0d99d85.tar.gz upstream-102cb4742c14f78bf86b7d77c568c205f0d99d85.tar.bz2 upstream-102cb4742c14f78bf86b7d77c568c205f0d99d85.zip |
kernel: bump to 4.4.35
Refresh patches on all 4.4 supported platforms.
077-0005-bgmac-stop-clearing-DMA-receive-control-register-rig.patch
removed as now upstream.
Compile & run tested: ar71xx - Archer C7 v2
Signed-off-by: Kevin Darbyshire-Bryant <kevin@darbyshire-bryant.me.uk>
Diffstat (limited to 'target/linux/ipq806x/patches-4.4/096-05-usb-dwc3-Update-register-fields-for-SuperSpeedPlus.patch')
-rw-r--r-- | target/linux/ipq806x/patches-4.4/096-05-usb-dwc3-Update-register-fields-for-SuperSpeedPlus.patch | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/target/linux/ipq806x/patches-4.4/096-05-usb-dwc3-Update-register-fields-for-SuperSpeedPlus.patch b/target/linux/ipq806x/patches-4.4/096-05-usb-dwc3-Update-register-fields-for-SuperSpeedPlus.patch index e4805db0b4..0030446eab 100644 --- a/target/linux/ipq806x/patches-4.4/096-05-usb-dwc3-Update-register-fields-for-SuperSpeedPlus.patch +++ b/target/linux/ipq806x/patches-4.4/096-05-usb-dwc3-Update-register-fields-for-SuperSpeedPlus.patch @@ -12,11 +12,9 @@ Signed-off-by: Felipe Balbi <balbi@kernel.org> drivers/usb/dwc3/core.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) -diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h -index c0520d67..6254b2f 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h -@@ -223,7 +223,8 @@ +@@ -222,7 +222,8 @@ /* Global HWPARAMS3 Register */ #define DWC3_GHWPARAMS3_SSPHY_IFC(n) ((n) & 3) #define DWC3_GHWPARAMS3_SSPHY_IFC_DIS 0 @@ -26,7 +24,7 @@ index c0520d67..6254b2f 100644 #define DWC3_GHWPARAMS3_HSPHY_IFC(n) (((n) & (3 << 2)) >> 2) #define DWC3_GHWPARAMS3_HSPHY_IFC_DIS 0 #define DWC3_GHWPARAMS3_HSPHY_IFC_UTMI 1 -@@ -249,6 +250,7 @@ +@@ -248,6 +249,7 @@ #define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f) #define DWC3_DCFG_SPEED_MASK (7 << 0) @@ -34,7 +32,7 @@ index c0520d67..6254b2f 100644 #define DWC3_DCFG_SUPERSPEED (4 << 0) #define DWC3_DCFG_HIGHSPEED (0 << 0) #define DWC3_DCFG_FULLSPEED2 (1 << 0) -@@ -339,6 +341,7 @@ +@@ -338,6 +340,7 @@ #define DWC3_DSTS_CONNECTSPD (7 << 0) @@ -42,5 +40,3 @@ index c0520d67..6254b2f 100644 #define DWC3_DSTS_SUPERSPEED (4 << 0) #define DWC3_DSTS_HIGHSPEED (0 << 0) #define DWC3_DSTS_FULLSPEED2 (1 << 0) --- -cgit v0.12 |