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author | Ram Chandra Jangir <rjangir@codeaurora.org> | 2018-05-04 21:57:33 +0530 |
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committer | John Crispin <john@phrozen.org> | 2018-05-24 17:24:31 +0200 |
commit | d805812e75d014a4ff6e1a832e286bdf0f7ebe3e (patch) | |
tree | ac5061d620a2f32a54dabda662fcb75300a9149f /target/linux/ipq806x/patches-4.14/0071-6-PCI-qcom-Force-GEN1-support.patch | |
parent | 9361c359e4e1648f3ec3f541c51a1982d677f31d (diff) | |
download | upstream-d805812e75d014a4ff6e1a832e286bdf0f7ebe3e.tar.gz upstream-d805812e75d014a4ff6e1a832e286bdf0f7ebe3e.tar.bz2 upstream-d805812e75d014a4ff6e1a832e286bdf0f7ebe3e.zip |
ipq806x: add kernel 4.14 support
- Rebased the patches for 4.14
- Dropped spi-qup and 0027, 0028, 0029
clk patches since it's already included
in upstream.
Tested on IPQ AP148 Board:
1) NOR boot and NAND boot
2) Tested USB and PCIe interfaces
3) WDOG test
4) cpu frequency scaling
5) ethernet, 2G and 5G WiFi
6) ubi sysupgrade
Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
Tested-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
(cherry picked from commit 93dd2f7211db6607184adadb488582e01fd5c29b)
Diffstat (limited to 'target/linux/ipq806x/patches-4.14/0071-6-PCI-qcom-Force-GEN1-support.patch')
-rw-r--r-- | target/linux/ipq806x/patches-4.14/0071-6-PCI-qcom-Force-GEN1-support.patch | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches-4.14/0071-6-PCI-qcom-Force-GEN1-support.patch b/target/linux/ipq806x/patches-4.14/0071-6-PCI-qcom-Force-GEN1-support.patch new file mode 100644 index 0000000000..f623532bdb --- /dev/null +++ b/target/linux/ipq806x/patches-4.14/0071-6-PCI-qcom-Force-GEN1-support.patch @@ -0,0 +1,61 @@ +From 4910cfd150342ec7b038892262923c725a9c4001 Mon Sep 17 00:00:00 2001 +From: Sham Muthayyan <smuthayy@codeaurora.org> +Date: Wed, 7 Sep 2016 16:44:28 +0530 +Subject: PCI: qcom: Force GEN1 support + +Change-Id: Ica54ddb737d7b851469deab1745f54bf431bd3f0 +Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org> +--- + drivers/pci/host/pcie-qcom.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/drivers/pci/dwc/pcie-qcom.c ++++ b/drivers/pci/dwc/pcie-qcom.c +@@ -129,6 +129,8 @@ + #define PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE 0x358 + #define SLV_ADDR_SPACE_SZ 0x10000000 + ++#define PCIE20_LNK_CONTROL2_LINK_STATUS2 0xA0 ++ + struct qcom_pcie_resources_2_1_0 { + struct clk *iface_clk; + struct clk *core_clk; +@@ -218,6 +220,7 @@ + struct phy *phy; + struct gpio_desc *reset; + struct qcom_pcie_ops *ops; ++ uint32_t force_gen1; + }; + + #define to_qcom_pcie(x) dev_get_drvdata((x)->dev) +@@ -532,6 +535,11 @@ + + /* wait for clock acquisition */ + usleep_range(1000, 1500); ++ if (pcie->force_gen1) { ++ writel_relaxed((readl_relaxed( ++ pcie->pci->dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2) | 1), ++ pcie->pci->dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2); ++ } + + + /* Set the Max TLP size to 2K, instead of using default of 4K */ +@@ -1382,6 +1390,8 @@ + struct dw_pcie *pci; + struct qcom_pcie *pcie; + int ret; ++ uint32_t force_gen1 = 0; ++ struct device_node *np = pdev->dev.of_node; + + pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); + if (!pcie) +@@ -1403,6 +1413,9 @@ + if (IS_ERR(pcie->reset)) + return PTR_ERR(pcie->reset); + ++ of_property_read_u32(np, "force_gen1", &force_gen1); ++ pcie->force_gen1 = force_gen1; ++ + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "parf"); + pcie->parf = devm_ioremap_resource(dev, res); + if (IS_ERR(pcie->parf)) |