diff options
| author | Koen Vandeputte <koen.vandeputte@ncentric.com> | 2018-05-23 16:44:09 +0200 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2018-05-24 08:58:17 +0200 |
| commit | 467b07e00c5ead98848587b8e06db61f7b33d3a8 (patch) | |
| tree | 6d9b1bf52932e5824299ecff4528759a0630f502 /target/linux/ipq806x/patches-4.14/0071-1-PCI-qcom-Fixed-IPQ806x-specific-clocks.patch | |
| parent | 82cf3c7c6199d5da88ff6872f288ec7f97afe184 (diff) | |
| download | upstream-467b07e00c5ead98848587b8e06db61f7b33d3a8.tar.gz upstream-467b07e00c5ead98848587b8e06db61f7b33d3a8.tar.bz2 upstream-467b07e00c5ead98848587b8e06db61f7b33d3a8.zip | |
kernel: bump 4.14 to 4.14.43
Refreshed all patches
Compile-tested on: cns3xxx, imx6, x86_64
Runtime-tested on: cns3xxx, imx6, x86_64
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Tested-by: Michael Yartys <michael.yartys@protonmail.com>
Diffstat (limited to 'target/linux/ipq806x/patches-4.14/0071-1-PCI-qcom-Fixed-IPQ806x-specific-clocks.patch')
| -rw-r--r-- | target/linux/ipq806x/patches-4.14/0071-1-PCI-qcom-Fixed-IPQ806x-specific-clocks.patch | 82 |
1 files changed, 41 insertions, 41 deletions
diff --git a/target/linux/ipq806x/patches-4.14/0071-1-PCI-qcom-Fixed-IPQ806x-specific-clocks.patch b/target/linux/ipq806x/patches-4.14/0071-1-PCI-qcom-Fixed-IPQ806x-specific-clocks.patch index 550c92e27c..b9f6e33be6 100644 --- a/target/linux/ipq806x/patches-4.14/0071-1-PCI-qcom-Fixed-IPQ806x-specific-clocks.patch +++ b/target/linux/ipq806x/patches-4.14/0071-1-PCI-qcom-Fixed-IPQ806x-specific-clocks.patch @@ -11,19 +11,19 @@ Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org> --- a/drivers/pci/dwc/pcie-qcom.c +++ b/drivers/pci/dwc/pcie-qcom.c -@@ -91,6 +91,8 @@ - struct clk *iface_clk; - struct clk *core_clk; - struct clk *phy_clk; +@@ -91,6 +91,8 @@ struct qcom_pcie_resources_2_1_0 { + struct clk *iface_clk; + struct clk *core_clk; + struct clk *phy_clk; + struct clk *aux_clk; + struct clk *ref_clk; - struct reset_control *pci_reset; - struct reset_control *axi_reset; - struct reset_control *ahb_reset; -@@ -249,6 +251,14 @@ - if (IS_ERR(res->phy_clk)) - return PTR_ERR(res->phy_clk); - + struct reset_control *pci_reset; + struct reset_control *axi_reset; + struct reset_control *ahb_reset; +@@ -249,6 +251,14 @@ static int qcom_pcie_get_resources_2_1_0 + if (IS_ERR(res->phy_clk)) + return PTR_ERR(res->phy_clk); + + res->aux_clk = devm_clk_get(dev, "aux"); + if (IS_ERR(res->aux_clk)) + return PTR_ERR(res->aux_clk); @@ -32,37 +32,37 @@ Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org> + if (IS_ERR(res->ref_clk)) + return PTR_ERR(res->ref_clk); + - res->pci_reset = devm_reset_control_get_exclusive(dev, "pci"); - if (IS_ERR(res->pci_reset)) - return PTR_ERR(res->pci_reset); -@@ -281,6 +291,8 @@ - clk_disable_unprepare(res->iface_clk); - clk_disable_unprepare(res->core_clk); - clk_disable_unprepare(res->phy_clk); + res->pci_reset = devm_reset_control_get_exclusive(dev, "pci"); + if (IS_ERR(res->pci_reset)) + return PTR_ERR(res->pci_reset); +@@ -281,6 +291,8 @@ static void qcom_pcie_deinit_2_1_0(struc + clk_disable_unprepare(res->iface_clk); + clk_disable_unprepare(res->core_clk); + clk_disable_unprepare(res->phy_clk); + clk_disable_unprepare(res->aux_clk); + clk_disable_unprepare(res->ref_clk); - regulator_disable(res->vdda); - regulator_disable(res->vdda_phy); - regulator_disable(res->vdda_refclk); -@@ -324,16 +336,28 @@ - goto err_assert_ahb; - } - + regulator_disable(res->vdda); + regulator_disable(res->vdda_phy); + regulator_disable(res->vdda_refclk); +@@ -324,16 +336,28 @@ static int qcom_pcie_init_2_1_0(struct q + goto err_assert_ahb; + } + + ret = clk_prepare_enable(res->core_clk); + if (ret) { + dev_err(dev, "cannot prepare/enable core clock\n"); + goto err_clk_core; + } + - ret = clk_prepare_enable(res->phy_clk); - if (ret) { - dev_err(dev, "cannot prepare/enable phy clock\n"); - goto err_clk_phy; - } - + ret = clk_prepare_enable(res->phy_clk); + if (ret) { + dev_err(dev, "cannot prepare/enable phy clock\n"); + goto err_clk_phy; + } + - ret = clk_prepare_enable(res->core_clk); + ret = clk_prepare_enable(res->aux_clk); - if (ret) { + if (ret) { - dev_err(dev, "cannot prepare/enable core clock\n"); - goto err_clk_core; + dev_err(dev, "cannot prepare/enable aux clock\n"); @@ -73,12 +73,12 @@ Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org> + if (ret) { + dev_err(dev, "cannot prepare/enable ref clock\n"); + goto err_clk_ref; - } - - ret = reset_control_deassert(res->ahb_reset); -@@ -389,10 +413,14 @@ - return 0; - + } + + ret = reset_control_deassert(res->ahb_reset); +@@ -389,10 +413,14 @@ static int qcom_pcie_init_2_1_0(struct q + return 0; + err_deassert_ahb: - clk_disable_unprepare(res->core_clk); -err_clk_core: @@ -86,10 +86,10 @@ Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org> +err_clk_ref: + clk_disable_unprepare(res->aux_clk); +err_clk_aux: - clk_disable_unprepare(res->phy_clk); + clk_disable_unprepare(res->phy_clk); err_clk_phy: + clk_disable_unprepare(res->core_clk); +err_clk_core: - clk_disable_unprepare(res->iface_clk); + clk_disable_unprepare(res->iface_clk); err_assert_ahb: - regulator_disable(res->vdda_phy); + regulator_disable(res->vdda_phy); |