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| author | John Crispin <john@openwrt.org> | 2015-08-17 06:17:47 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2015-08-17 06:17:47 +0000 |
| commit | 6b775f4517b31f4226fbf08fa4e35e9100c92635 (patch) | |
| tree | 2d8fdc29190b1b0fe9c8ba54ea3cd70a0f9cbaa6 /target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch | |
| parent | 6856535e290aefcebd257b19a6b7d8d9c70c1171 (diff) | |
| download | upstream-6b775f4517b31f4226fbf08fa4e35e9100c92635.tar.gz upstream-6b775f4517b31f4226fbf08fa4e35e9100c92635.tar.bz2 upstream-6b775f4517b31f4226fbf08fa4e35e9100c92635.zip | |
ipq806x: add hwspinlock support
This change cherry-picks the following 3 changes from linux-next:
*fb7737 hwspinlock/core: add device tree support
*19a0f6 hwspinlock: qcom: Add support for Qualcomm HW Mutex block
*bd5717 hwspinlock: qcom: Correct msb in regmap_field
We're also adding a patch to add the hardware spinlock device nodes on
IPQ806x platforms (033-soc-qcom-Add-sfbp-device-to-IPQ806x-dts.patch).
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 46655
Diffstat (limited to 'target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch')
| -rw-r--r-- | target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch b/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch index fc2fe0a460..f53b23dfe8 100644 --- a/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch +++ b/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch @@ -134,10 +134,11 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> / { model = "Qualcomm IPQ8064"; -@@ -329,5 +331,127 @@ - #reset-cells = <1>; +@@ -333,6 +335,129 @@ + compatible = "syscon"; + reg = <0x01200600 0x100>; }; - ++ + pcie0: pci@1b500000 { + compatible = "qcom,pcie-v0"; + reg = <0x1b500000 0x1000 @@ -261,4 +262,5 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> + status = "disabled"; + }; }; - }; + + sfpb_mutex: sfpb-mutex { |