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authorFelix Fietkau <nbd@openwrt.org>2015-08-04 23:09:55 +0000
committerFelix Fietkau <nbd@openwrt.org>2015-08-04 23:09:55 +0000
commitf7651fdba51fae235bb9e43fcecc0478faf927d0 (patch)
treedf2c2dfd4c247210c9ba11828619b5eaf1584b91 /target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch
parentc4c986e419d7098104681c364978d065a3b7f2e1 (diff)
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ipq806x: fix pcie pinmux naming in ipq806x dts
PCIe controller nodes are numbers 0/1/2 in the chipset dtsi file, but the pinmux nodes are numbers 1/2/3. We'll make it consistent by changing the pinmux numbering to match the controller's one. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46556
Diffstat (limited to 'target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch')
-rw-r--r--target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch10
1 files changed, 5 insertions, 5 deletions
diff --git a/target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch b/target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch
index 809d74372b..851682a9aa 100644
--- a/target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch
+++ b/target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch
@@ -11,7 +11,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
-@@ -14,8 +14,9 @@
+@@ -19,8 +19,9 @@
};
};
@@ -22,7 +22,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
};
chosen {
-@@ -54,6 +55,15 @@
+@@ -59,6 +60,15 @@
bias-none;
};
};
@@ -38,8 +38,8 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
};
gsbi@16300000 {
-@@ -163,5 +173,33 @@
- pinctrl-0 = <&pcie2_pins>;
+@@ -168,5 +178,33 @@
+ pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
};
+
@@ -99,7 +99,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
gsbi2: gsbi@12480000 {
@@ -173,5 +183,44 @@
- pinctrl-0 = <&pcie3_pins>;
+ pinctrl-0 = <&pcie2_pins>;
pinctrl-names = "default";
};
+