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authorFelix Fietkau <nbd@openwrt.org>2015-08-07 08:36:16 +0000
committerFelix Fietkau <nbd@openwrt.org>2015-08-07 08:36:16 +0000
commitc7bf2accc94e081fab0c595c7e5ddd70cfe6b0c1 (patch)
treeabfce27ffeaf84f9ec70582fbbb3ad3c889c49c3 /target/linux/ipq806x/patches-3.18/157-ARM-DT-ipq8064-Add-ADM-device-node.patch
parentde19f06d12e9afd1278e46909bd973189235b2fa (diff)
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ipq806x: Add ADM support
These are cherry-picked & backported from LKML: *https://lkml.org/lkml/2015/3/17/19 They are enabled on both 3.18 and 4.1 kernel. Patches 150 to 154 are applying changes merged since 3.18; they enable mechanisms used by the ADM driver. ADM engine is used by the NAND controller, so it is necessary to bring-up NAND flash support. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46567
Diffstat (limited to 'target/linux/ipq806x/patches-3.18/157-ARM-DT-ipq8064-Add-ADM-device-node.patch')
-rw-r--r--target/linux/ipq806x/patches-3.18/157-ARM-DT-ipq8064-Add-ADM-device-node.patch54
1 files changed, 54 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches-3.18/157-ARM-DT-ipq8064-Add-ADM-device-node.patch b/target/linux/ipq806x/patches-3.18/157-ARM-DT-ipq8064-Add-ADM-device-node.patch
new file mode 100644
index 0000000000..64b002267e
--- /dev/null
+++ b/target/linux/ipq806x/patches-3.18/157-ARM-DT-ipq8064-Add-ADM-device-node.patch
@@ -0,0 +1,54 @@
+From 1fb18acab2d71e7e4efd9c10492edb1baf84dcc0 Mon Sep 17 00:00:00 2001
+From: Andy Gross <agross@codeaurora.org>
+Date: Wed, 20 May 2015 15:41:07 +0530
+Subject: [PATCH] ARM: DT: ipq8064: Add ADM device node
+
+This patch adds support for the ADM DMA on the IPQ8064 SOC
+
+Signed-off-by: Andy Gross <agross@codeaurora.org>
+---
+ arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 4 ++++
+ arch/arm/boot/dts/qcom-ipq8064.dtsi | 21 +++++++++++++++++++++
+ 2 files changed, 25 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
++++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+@@ -90,6 +90,10 @@
+
+ cs-gpios = <&qcom_pinmux 20 0>;
+
++ dmas = <&adm_dma 6>,
++ <&adm_dma 5>;
++ dma-names = "rx", "tx";
++
+ flash: m25p80@0 {
+ compatible = "s25fl256s1";
+ #address-cells = <1>;
+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+@@ -657,5 +657,25 @@
+ };
+ };
+
++ adm_dma: dma@18300000 {
++ compatible = "qcom,adm";
++ reg = <0x18300000 0x100000>;
++ interrupts = <0 170 0>;
++ #dma-cells = <1>;
++
++ clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
++ clock-names = "core", "iface";
++
++ resets = <&gcc ADM0_RESET>,
++ <&gcc ADM0_PBUS_RESET>,
++ <&gcc ADM0_C0_RESET>,
++ <&gcc ADM0_C1_RESET>,
++ <&gcc ADM0_C2_RESET>;
++ reset-names = "clk", "pbus", "c0", "c1", "c2";
++ qcom,ee = <0>;
++
++ status = "disabled";
++ };
++
+ };
+ };