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author | John Crispin <john@openwrt.org> | 2015-05-29 12:26:01 +0000 |
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committer | John Crispin <john@openwrt.org> | 2015-05-29 12:26:01 +0000 |
commit | d2a2eb7e48f66e82dee1bae444ecfaff2c526fe2 (patch) | |
tree | d7e9bc9023dd972b9cf62e879c3432a0bc319d58 /target/linux/ipq806x/patches-3.18/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch | |
parent | 72369c297663730264c761dda32004277da918df (diff) | |
download | upstream-d2a2eb7e48f66e82dee1bae444ecfaff2c526fe2.tar.gz upstream-d2a2eb7e48f66e82dee1bae444ecfaff2c526fe2.tar.bz2 upstream-d2a2eb7e48f66e82dee1bae444ecfaff2c526fe2.zip |
ipq806x: replace caf nss-gmac driver by upstream stmmac
This driver has been cherry-picked and backported from the following
LKML thread:
*https://lkml.org/lkml/2015/5/26/744
It also updates the DT accordingly.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 45831
Diffstat (limited to 'target/linux/ipq806x/patches-3.18/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch')
-rw-r--r-- | target/linux/ipq806x/patches-3.18/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/target/linux/ipq806x/patches-3.18/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch b/target/linux/ipq806x/patches-3.18/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch index 7bee560e39..80ac25faeb 100644 --- a/target/linux/ipq806x/patches-3.18/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch +++ b/target/linux/ipq806x/patches-3.18/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch @@ -60,7 +60,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> }; --- a/arch/arm/boot/dts/qcom-ipq8064-db149.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-db149.dts -@@ -37,6 +37,30 @@ +@@ -30,6 +30,30 @@ bias-disable; }; @@ -91,10 +91,11 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> spi_pins: spi_pins { mux { pins = "gpio18", "gpio19", "gpio21"; -@@ -153,6 +177,27 @@ +@@ -128,5 +152,26 @@ + usb30@1 { status = "ok"; }; - ++ + pcie0: pci@1b500000 { + status = "ok"; + reset-gpio = <&qcom_pinmux 3 0>; @@ -115,10 +116,8 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> + pinctrl-0 = <&pcie3_pins>; + pinctrl-names = "default"; + }; -+ - mdio0: mdio { - compatible = "virtual,mdio-gpio"; - #address-cells = <1>; + }; + }; --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -3,6 +3,8 @@ @@ -130,7 +129,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> / { model = "Qualcomm IPQ8064"; -@@ -306,6 +307,129 @@ +@@ -306,6 +308,129 @@ #reset-cells = <1>; }; @@ -260,7 +259,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> hs_phy_1: phy@100f8800 { compatible = "qcom,dwc3-hs-usb-phy"; reg = <0x100f8800 0x30>; -@@ -389,6 +513,5 @@ +@@ -389,6 +514,5 @@ dr_mode = "host"; }; }; |