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| author | Robert Marko <robert.marko@sartura.hr> | 2021-10-31 11:38:31 +0100 |
|---|---|---|
| committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2021-10-31 21:24:47 +0100 |
| commit | fa3646c0033eb93d6397b55c1a4e921dff1049f8 (patch) | |
| tree | 51d70c19254e2d689bb7d0b6a10b0ea825c54407 /target/linux/ipq806x/files/arch | |
| parent | 766d1d675baf332251d0d80a11e835eeb05ada11 (diff) | |
| download | upstream-fa3646c0033eb93d6397b55c1a4e921dff1049f8.tar.gz upstream-fa3646c0033eb93d6397b55c1a4e921dff1049f8.tar.bz2 upstream-fa3646c0033eb93d6397b55c1a4e921dff1049f8.zip | |
ipq806x: ecw5410: drop GPIO based MDIO1 node
It looks like this is a leftover before there was a proper MDIO driver.
Since both PHY-s are connected to the HW MDIO bus there is no reason for
this to exist anymore, especially since it uses the same pins as the HW
controller and has the pinmux for the set to "MDIO" so this worked by
pure luck as GPIO MDIO would probe first and override the HW driver.
Move the GMAC3 to simply use the same MDIO bus phandle.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Diffstat (limited to 'target/linux/ipq806x/files/arch')
| -rw-r--r-- | target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts | 29 |
1 files changed, 10 insertions, 19 deletions
diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts index 43bed451cb..57724c19d7 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts @@ -34,7 +34,6 @@ aliases { serial1 = &gsbi1_serial; - mdio-gpio0 = &mdio0; ethernet0 = &gmac3; ethernet1 = &gmac2; @@ -293,26 +292,18 @@ }; }; -&soc { - mdio1: mdio { - compatible = "virtual,mdio-gpio"; - #address-cells = <1>; - #size-cells = <0>; - - status = "okay"; - - pinctrl-0 = <&mdio0_pins>; - pinctrl-names = "default"; +&mdio0 { + status = "okay"; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; - phy0: ethernet-phy@0 { - reg = <0>; - }; + phy0: ethernet-phy@0 { + reg = <0>; + }; - phy1: ethernet-phy@1 { - reg = <1>; - }; + phy1: ethernet-phy@1 { + reg = <1>; }; }; @@ -330,7 +321,7 @@ status = "okay"; qcom,id = <3>; - mdiobus = <&mdio1>; + mdiobus = <&mdio0>; phy-mode = "sgmii"; phy-handle = <&phy0>; |