diff options
| author | Christian Lamparter <chunkeey@gmail.com> | 2021-12-28 00:30:13 +0100 |
|---|---|---|
| committer | Christian Lamparter <chunkeey@gmail.com> | 2022-02-05 00:41:36 +0100 |
| commit | 20470580cd271de1e6017c88261b577ed4773476 (patch) | |
| tree | dc9f849a262c32bb7b9bfdfa03cae3d98cd637bc /target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts | |
| parent | a1693a8c2cdc74a5bf33cabaadc2174f2f088dbf (diff) | |
| download | upstream-20470580cd271de1e6017c88261b577ed4773476.tar.gz upstream-20470580cd271de1e6017c88261b577ed4773476.tar.bz2 upstream-20470580cd271de1e6017c88261b577ed4773476.zip | |
ipq806x: utilize nvmem-cells for pre-calibration data
converts extraction entries from 11-ath10k-caldata into
nvmem-cells in the individual board's device-tree file.
The patch also moves previously existing referenced
nvmem-cells data nodes which were placed at the end
back into the partitions node. As well as removing
some duplicated properties from qcom-ipq8065-xr500.dts's
art (the included nighthawk.dtsi defines those already).
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Diffstat (limited to 'target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts')
| -rw-r--r-- | target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts | 60 |
1 files changed, 33 insertions, 27 deletions
diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts index 4b4e8736d4..e7ae1a25b2 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts @@ -340,10 +340,38 @@ read-only; }; - ART: ART@180000 { + ART@180000 { label = "ART"; reg = <0x180000 0x40000>; read-only; + + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_ART_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_ART_6: macaddr@6 { + reg = <0x6 0x6>; + }; + + macaddr_ART_18: macaddr@18 { + reg = <0x18 0x6>; + }; + + macaddr_ART_1e: macaddr@1e { + reg = <0x1e 0x6>; + }; + + precal_ART_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_ART_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; BOOTCONFIG@1c0000 { @@ -406,8 +434,8 @@ compatible = "pci168c,0040"; reg = <0x00010000 0 0 0 0>; - nvmem-cells = <&macaddr_ART_1e>; - nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_ART_1e>, <&precal_ART_1000>; + nvmem-cell-names = "mac-address", "pre-calibration"; }; }; }; @@ -426,8 +454,8 @@ compatible = "pci168c,0040"; reg = <0x00010000 0 0 0 0>; - nvmem-cells = <&macaddr_ART_18>; - nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_ART_18>, <&precal_ART_5000>; + nvmem-cell-names = "mac-address", "pre-calibration"; }; }; }; @@ -496,25 +524,3 @@ }; }; }; - -&ART { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_ART_0: macaddr@0 { - reg = <0x0 0x6>; - }; - - macaddr_ART_6: macaddr@6 { - reg = <0x6 0x6>; - }; - - macaddr_ART_18: macaddr@18 { - reg = <0x18 0x6>; - }; - - macaddr_ART_1e: macaddr@1e { - reg = <0x1e 0x6>; - }; -}; |