ipq806x: disentangle and clean up SoC DTSI files

So far, the DTSI files on ipq806x had a linear inheritance:

  qcom-ipq8064.dtsi
  v
  qcom-ipq8064-v1.0.dtsi
  v
  qcom-ipq8064-v2.0.dtsi
  v
  qcom-ipq8065.dtsi

This poses problems when one wants to set something that is specific
to an architecture closer to the top of the tree.

In this patch, we remove the chain-like inheritance and have all
other files derived from qcom-ipq8064.dtsi (changing this name to
something more generic is not possible due to upstream use).

The removal of inheritance will require a few entries to be copied
from qcom-ipq8064-v2.0.dtsi to qcom-ipq8065.dtsi. However, it also
opens an opportunity for some clean-up:

- Many definitions can be improved by just using the innermost labels.

- Instead of disabling the CPU_SPC node for ipq8065, it is now off by
  default and enabled where needed.

- Instead of patching phy-tx0-term-offset into qcom-ipq8064.dtsi and
  then having it changed for qcom-ipq8064-v2.0/qcom-ipq8065, just have
  the appropriate settings done in the lower DTSI files directly.

- For the opp_table0 adjustments for ipq8065, just redefine what's
  changed, but don't add all the untouched properties again.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>

4 files changed, 64 insertions, 64 deletions

diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
index 7093b075e4..cd8f4635cb 100644
--- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
+++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
@@ -1 +1,17 @@
 #include "qcom-ipq8064.dtsi"
+
+&CPU_SPC {
+	status = "okay";
+};
+
+&pcie0 {
+	phy-tx0-term-offset = <7>;
+};
+
+&pcie1 {
+	phy-tx0-term-offset = <7>;
+};
+
+&pcie2 {
+	phy-tx0-term-offset = <7>;
+};
diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
index dd272c7fc7..467c43590b 100644
--- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
+++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
@@ -1,20 +1,19 @@
-#include "qcom-ipq8064-v1.0.dtsi"
+#include "qcom-ipq8064.dtsi"
 
-/ {
-	soc: soc {
+&CPU_SPC {
+	status = "okay";
+};
 
-		pcie0: pci@1b500000 {
-			phy-tx0-term-offset = <0>;
-		};
+&pcie0 {
+	phy-tx0-term-offset = <0>;
+};
 
-		pcie1: pci@1b700000 {
-			phy-tx0-term-offset = <0>;
-		};
+&pcie1 {
+	phy-tx0-term-offset = <0>;
+};
 
-		pcie2: pci@1b900000 {
-			phy-tx0-term-offset = <0>;
-		};
-	};
+&pcie2 {
+	phy-tx0-term-offset = <0>;
 };
 
 &ss_phy_0 {
diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064.dtsi b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 7a84970a14..1c08b44535 100644
--- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -79,7 +79,7 @@
 			CPU_SPC: spc {
 				compatible = "qcom,idle-state-spc",
 						"arm,idle-state";
-				status = "okay";
+				status = "disabled";
 				entry-latency-us = <400>;
 				exit-latency-us = <900>;
 				min-residency-us = <3000>;
@@ -1219,8 +1219,6 @@
 
 			perst-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
 
-			phy-tx0-term-offset = <7>;
-
 			status = "disabled";
 		};
 
@@ -1273,8 +1271,6 @@
 
 			perst-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
 
-			phy-tx0-term-offset = <7>;
-
 			status = "disabled";
 		};
 
@@ -1327,8 +1323,6 @@
 
 			perst-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>;
 
-			phy-tx0-term-offset = <7>;
-
 			status = "disabled";
 		};
 
diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065.dtsi b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065.dtsi
index fdd4697887..a95f4a12e0 100644
--- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065.dtsi
+++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065.dtsi
@@ -1,45 +1,51 @@
-#include "qcom-ipq8064-v2.0.dtsi"
+#include "qcom-ipq8064.dtsi"
 
 / {
 	model = "Qualcomm IPQ8065";
 	compatible = "qcom,ipq8065", "qcom,ipq8064";
 
-	soc: soc {
-
-		rpm@108000 {
-
-			regulators {
-
-				smb208_s2a: s2a {
-					regulator-min-microvolt = <775000>;
-					regulator-max-microvolt = <1275000>;
-				};
-
-				smb208_s2b: s2b {
-					regulator-min-microvolt = <775000>;
-					regulator-max-microvolt = <1275000>;
-				};
-			};
-		};
-	};
-	
 	cpus {
 		qcom,l2 {
 			qcom,l2-cpufreq = <384000000 600000000 1400000000>;
 		};
-
-		idle-states {
-			CPU_SPC: spc {
-				status = "disabled";
-			};
-		};
 	};
 };
 
-&opp_table0 {
-	compatible = "operating-points-v2-qcom-cpu";
-	nvmem-cells = <&speedbin_efuse>;
+&pcie0 {
+	phy-tx0-term-offset = <0>;
+};
+
+&pcie1 {
+	phy-tx0-term-offset = <0>;
+};
+
+&pcie2 {
+	phy-tx0-term-offset = <0>;
+};
+
+&smb208_s2a {
+	regulator-min-microvolt = <775000>;
+	regulator-max-microvolt = <1275000>;
+};
 
+&smb208_s2b {
+	regulator-min-microvolt = <775000>;
+	regulator-max-microvolt = <1275000>;
+};
+
+&ss_phy_0 {
+	rx_eq = <2>;
+	tx_deamp_3_5db = <32>;
+	mpll = <0xa0>;
+};
+
+&ss_phy_1 {
+	rx_eq = <2>;
+	tx_deamp_3_5db = <32>;
+	mpll = <0xa0>;
+};
+
+&opp_table0 {
 	/* 
 	 * On ipq8065 1.2 ghz freq is not present
 	 * Remove it to make cpufreq work and not
@@ -49,7 +55,6 @@
 	/delete-node/opp-1200000000;
 
 	opp-384000000 {
-		opp-hz = /bits/ 64 <384000000>;
 		opp-microvolt-speed0-pvs0-v0 = <975000>;
 		opp-microvolt-speed0-pvs1-v0 = <950000>;
 		opp-microvolt-speed0-pvs2-v0 = <925000>;
@@ -57,12 +62,9 @@
 		opp-microvolt-speed0-pvs4-v0 = <875000>;
 		opp-microvolt-speed0-pvs5-v0 = <825000>;
 		opp-microvolt-speed0-pvs6-v0 = <775000>;
-		opp-supported-hw = <0x1>;
-		clock-latency-ns = <100000>;
 	};
 
 	opp-600000000 {
-		opp-hz = /bits/ 64 <600000000>;
 		opp-microvolt-speed0-pvs0-v0 = <1000000>;
 		opp-microvolt-speed0-pvs1-v0 = <975000>;
 		opp-microvolt-speed0-pvs2-v0 = <950000>;
@@ -70,12 +72,9 @@
 		opp-microvolt-speed0-pvs4-v0 = <900000>;
 		opp-microvolt-speed0-pvs5-v0 = <850000>;
 		opp-microvolt-speed0-pvs6-v0 = <800000>;
-		opp-supported-hw = <0x1>;
-		clock-latency-ns = <100000>;
 	};
 
 	opp-800000000 {
-		opp-hz = /bits/ 64 <800000000>;
 		opp-microvolt-speed0-pvs0-v0 = <1050000>;
 		opp-microvolt-speed0-pvs1-v0 = <1025000>;
 		opp-microvolt-speed0-pvs2-v0 = <1000000>;
@@ -83,12 +82,9 @@
 		opp-microvolt-speed0-pvs4-v0 = <950000>;
 		opp-microvolt-speed0-pvs5-v0 = <900000>;
 		opp-microvolt-speed0-pvs6-v0 = <850000>;
-		opp-supported-hw = <0x1>;
-		clock-latency-ns = <100000>;
 	};
 
 	opp-1000000000 {
-		opp-hz = /bits/ 64 <1000000000>;
 		opp-microvolt-speed0-pvs0-v0 = <1100000>;
 		opp-microvolt-speed0-pvs1-v0 = <1075000>;
 		opp-microvolt-speed0-pvs2-v0 = <1050000>;
@@ -96,12 +92,9 @@
 		opp-microvolt-speed0-pvs4-v0 = <1000000>;
 		opp-microvolt-speed0-pvs5-v0 = <950000>;
 		opp-microvolt-speed0-pvs6-v0 = <900000>;
-		opp-supported-hw = <0x1>;
-		clock-latency-ns = <100000>;
 	};
 
 	opp-1400000000 {
-		opp-hz = /bits/ 64 <1400000000>;
 		opp-microvolt-speed0-pvs0-v0 = <1175000>;
 		opp-microvolt-speed0-pvs1-v0 = <1150000>;
 		opp-microvolt-speed0-pvs2-v0 = <1125000>;
@@ -109,8 +102,6 @@
 		opp-microvolt-speed0-pvs4-v0 = <1075000>;
 		opp-microvolt-speed0-pvs5-v0 = <1025000>;
 		opp-microvolt-speed0-pvs6-v0 = <975000>;
-		opp-supported-hw = <0x1>;
-		clock-latency-ns = <100000>;
 	};
 
 	opp-1725000000 {