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author | Pavel Kubelun <be.dissent@gmail.com> | 2017-03-23 17:59:30 +0300 |
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committer | John Crispin <john@phrozen.org> | 2017-03-27 08:05:10 +0200 |
commit | dc32d0a53cc01d9f644c6e9851b6770440d4b28c (patch) | |
tree | 3b4f94918573c80aadfb2c4ad53d267f4e4bb448 /target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi | |
parent | 02fe9423372c036d1746189b488eb46e0c376491 (diff) | |
download | upstream-dc32d0a53cc01d9f644c6e9851b6770440d4b28c.tar.gz upstream-dc32d0a53cc01d9f644c6e9851b6770440d4b28c.tar.bz2 upstream-dc32d0a53cc01d9f644c6e9851b6770440d4b28c.zip |
ipq806x: add ipq806x specific tsens driver
Current upstream driver doesnt fully support ipq806x devices
ipq806x has 11 sensors, the upstream one doesn't allow to check
sensors 0-4, only 5-10.
A specific driver for ipq806x has been found in Qualcomm SDK repo.
https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-msm/commit/?h=release/endive_preview_cc&id=c089e464cd7ce652419a0dc44d7959ce4d24b8a5
https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-msm/commit/?h=release/endive_preview_cc&id=c23d94b702c4182862e7f5051a2b7d00bb922a29
https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-msm/commit/?h=release/endive_preview_cc&id=742f3684b62a6b9f082cb49404b1a92dc0b16bf5
https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-msm/commit/?h=release/endive_preview_cc&id=c0a9b2e2a382c152fa128f5b864c800dd6dfb311
Merging it into LEDE with this commit.
Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
Diffstat (limited to 'target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi')
-rw-r--r-- | target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi | 391 |
1 files changed, 332 insertions, 59 deletions
diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi index 3893f45637..dd55754106 100644 --- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -78,86 +78,354 @@ }; thermal-zones { - cpu-thermal0 { - polling-delay-passive = <250>; - polling-delay = <1000>; + tsens_tz_sensor0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 0>; - thermal-sensors = <&gcc 5>; - coefficients = <1132 0>; + trips { + cpu-critical-hi { + temperature = <125>; + hysteresis = <2>; + type = "critical_high"; + }; + + cpu-config-hi { + temperature = <105>; + hysteresis = <2>; + type = "configurable_hi"; + }; + + cpu-config-lo { + temperature = <95>; + hysteresis = <2>; + type = "configurable_lo"; + }; + + cpu-critical-low { + temperature = <0>; + hysteresis = <2>; + type = "critical_low"; + }; + }; + }; + + tsens_tz_sensor1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 1>; + + trips { + cpu-critical-hi { + temperature = <125>; + hysteresis = <2>; + type = "critical_high"; + }; + + cpu-config-hi { + temperature = <105>; + hysteresis = <2>; + type = "configurable_hi"; + }; + + cpu-config-lo { + temperature = <95>; + hysteresis = <2>; + type = "configurable_lo"; + }; + + cpu-critical-low { + temperature = <0>; + hysteresis = <2>; + type = "critical_low"; + }; + }; + }; + + tsens_tz_sensor2 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 2>; + + trips { + cpu-critical-hi { + temperature = <125>; + hysteresis = <2>; + type = "critical_high"; + }; + + cpu-config-hi { + temperature = <105>; + hysteresis = <2>; + type = "configurable_hi"; + }; + + cpu-config-lo { + temperature = <95>; + hysteresis = <2>; + type = "configurable_lo"; + }; + + cpu-critical-low { + temperature = <0>; + hysteresis = <2>; + type = "critical_low"; + }; + }; + }; + + tsens_tz_sensor3 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 3>; trips { - cpu_alert0: trip0 { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; + cpu-critical-hi { + temperature = <125>; + hysteresis = <2>; + type = "critical_high"; + }; + + cpu-config-hi { + temperature = <105>; + hysteresis = <2>; + type = "configurable_hi"; }; - cpu_crit0: trip1 { - temperature = <110000>; - hysteresis = <2000>; - type = "critical"; + + cpu-config-lo { + temperature = <95>; + hysteresis = <2>; + type = "configurable_lo"; + }; + + cpu-critical-low { + temperature = <0>; + hysteresis = <2>; + type = "critical_low"; }; }; }; - cpu-thermal1 { - polling-delay-passive = <250>; - polling-delay = <1000>; + tsens_tz_sensor4 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 4>; + + trips { + cpu-critical-hi { + temperature = <125>; + hysteresis = <2>; + type = "critical_high"; + }; + + cpu-config-hi { + temperature = <105>; + hysteresis = <2>; + type = "configurable_hi"; + }; + + cpu-config-lo { + temperature = <95>; + hysteresis = <2>; + type = "configurable_lo"; + }; + + cpu-critical-low { + temperature = <0>; + hysteresis = <2>; + type = "critical_low"; + }; + }; + }; + + tsens_tz_sensor5 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 5>; + + trips { + cpu-critical-hi { + temperature = <125>; + hysteresis = <2>; + type = "critical_high"; + }; + + cpu-config-hi { + temperature = <105>; + hysteresis = <2>; + type = "configurable_hi"; + }; + + cpu-config-lo { + temperature = <95>; + hysteresis = <2>; + type = "configurable_lo"; + }; + + cpu-critical-low { + temperature = <0>; + hysteresis = <2>; + type = "critical_low"; + }; + }; + }; - thermal-sensors = <&gcc 6>; - coefficients = <1132 0>; + tsens_tz_sensor6 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 6>; trips { - cpu_alert1: trip0 { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; + cpu-critical-hi { + temperature = <125>; + hysteresis = <2>; + type = "critical_high"; + }; + + cpu-config-hi { + temperature = <105>; + hysteresis = <2>; + type = "configurable_hi"; }; - cpu_crit1: trip1 { - temperature = <110000>; - hysteresis = <2000>; - type = "critical"; + + cpu-config-lo { + temperature = <95>; + hysteresis = <2>; + type = "configurable_lo"; + }; + + cpu-critical-low { + temperature = <0>; + hysteresis = <2>; + type = "critical_low"; }; }; }; - cpu-thermal2 { - polling-delay-passive = <250>; - polling-delay = <1000>; + tsens_tz_sensor7 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 7>; - thermal-sensors = <&gcc 7>; - coefficients = <1199 0>; + trips { + cpu-critical-hi { + temperature = <125>; + hysteresis = <2>; + type = "critical_high"; + }; + + cpu-config-hi { + temperature = <105>; + hysteresis = <2>; + type = "configurable_hi"; + }; + + cpu-config-lo { + temperature = <95>; + hysteresis = <2>; + type = "configurable_lo"; + }; + + cpu-critical-low { + temperature = <0>; + hysteresis = <2>; + type = "critical_low"; + }; + }; + }; + + tsens_tz_sensor8 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 8>; trips { - cpu_alert2: trip0 { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; + cpu-critical-hi { + temperature = <125>; + hysteresis = <2>; + type = "critical_high"; + }; + + cpu-config-hi { + temperature = <105>; + hysteresis = <2>; + type = "configurable_hi"; }; - cpu_crit2: trip1 { - temperature = <110000>; - hysteresis = <2000>; - type = "critical"; + + cpu-config-lo { + temperature = <95>; + hysteresis = <2>; + type = "configurable_lo"; + }; + + cpu-critical-low { + temperature = <0>; + hysteresis = <2>; + type = "critical_low"; }; }; }; - cpu-thermal3 { - polling-delay-passive = <250>; - polling-delay = <1000>; + tsens_tz_sensor9 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 9>; + + trips { + cpu-critical-hi { + temperature = <125>; + hysteresis = <2>; + type = "critical_high"; + }; + + cpu-config-hi { + temperature = <105>; + hysteresis = <2>; + type = "configurable_hi"; + }; + + cpu-config-lo { + temperature = <95>; + hysteresis = <2>; + type = "configurable_lo"; + }; + + cpu-critical-low { + temperature = <0>; + hysteresis = <2>; + type = "critical_low"; + }; + }; + }; - thermal-sensors = <&gcc 8>; - coefficients = <1132 0>; + tsens_tz_sensor10 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 10>; trips { - cpu_alert3: trip0 { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; + cpu-critical-hi { + temperature = <125>; + hysteresis = <2>; + type = "critical_high"; }; - cpu_crit3: trip1 { - temperature = <110000>; - hysteresis = <2000>; - type = "critical"; + + cpu-config-hi { + temperature = <105>; + hysteresis = <2>; + type = "configurable_hi"; + }; + + cpu-config-lo { + temperature = <95>; + hysteresis = <2>; + type = "configurable_lo"; + }; + + cpu-critical-low { + temperature = <0>; + hysteresis = <2>; + type = "critical_low"; }; }; }; @@ -273,15 +541,14 @@ qfprom: qfprom@700000 { compatible = "qcom,qfprom", "syscon"; - reg = <0x00700000 0x1000>; + reg = <0x700000 0x1000>; #address-cells = <1>; #size-cells = <1>; - ranges; - - tsens_calib: calib { + status = "okay"; + tsens_calib: calib@400 { reg = <0x400 0x10>; }; - tsens_backup: backup_calib { + tsens_backup: backup@410 { reg = <0x410 0x10>; }; }; @@ -620,11 +887,17 @@ gcc: clock-controller@900000 { compatible = "qcom,gcc-ipq8064"; reg = <0x00900000 0x4000>; - nvmem-cells = <&tsens_calib>, <&tsens_backup>; - nvmem-cell-names = "calib", "calib_backup"; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; + }; + + tsens: thermal-sensor@900000 { + compatible = "qcom,ipq8064-tsens"; + reg = <0x900000 0x3680>; + nvmem-cells = <&tsens_calib>, <&tsens_backup>; + nvmem-cell-names = "calib", "calib_backup"; + interrupts = <0 178 0>; #thermal-sensor-cells = <1>; }; |