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| author | Christian Lamparter <chunkeey@gmail.com> | 2019-12-05 02:10:26 +0100 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2019-12-19 22:41:57 +0100 |
| commit | afcb78f1035da7ca93b2afc9305aab18e930c43d (patch) | |
| tree | 30084e10ca5a1912a273cf006ed1e1e62fd41538 /target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064.dtsi | |
| parent | 96a509eeeb6125e147b11752e02f3176f43e3db5 (diff) | |
| download | upstream-afcb78f1035da7ca93b2afc9305aab18e930c43d.tar.gz upstream-afcb78f1035da7ca93b2afc9305aab18e930c43d.tar.bz2 upstream-afcb78f1035da7ca93b2afc9305aab18e930c43d.zip | |
ipq806x: use new usb3 implementation
Use new usb3 implementation and refresh dts to the new dwc3 structure
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
[proper authorship of the patch]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Diffstat (limited to 'target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064.dtsi')
| -rw-r--r-- | target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064.dtsi | 66 |
1 files changed, 30 insertions, 36 deletions
diff --git a/target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064.dtsi b/target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064.dtsi index 8387460d27..54869de44f 100644 --- a/target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -920,64 +920,41 @@ reg = <0x01200600 0x100>; }; - hs_phy_1: phy@100f8800 { + hs_phy_0: hs_phy_0 { compatible = "qcom,dwc3-hs-usb-phy"; - reg = <0x100f8800 0x30>; - clocks = <&gcc USB30_1_UTMI_CLK>; - clock-names = "ref"; - #phy-cells = <0>; - - status = "disabled"; - }; - - ss_phy_1: phy@100f8830 { - compatible = "qcom,dwc3-ss-usb-phy"; - reg = <0x100f8830 0x30>; - clocks = <&gcc USB30_1_MASTER_CLK>; - clock-names = "ref"; - #phy-cells = <0>; - - status = "disabled"; - }; - - hs_phy_0: phy@110f8800 { - compatible = "qcom,dwc3-hs-usb-phy"; - reg = <0x110f8800 0x30>; + regmap = <&usb3_0>; clocks = <&gcc USB30_0_UTMI_CLK>; clock-names = "ref"; #phy-cells = <0>; - - status = "disabled"; }; - ss_phy_0: phy@110f8830 { + ss_phy_0: ss_phy_0 { compatible = "qcom,dwc3-ss-usb-phy"; - reg = <0x110f8830 0x30>; + regmap = <&usb3_0>; clocks = <&gcc USB30_0_MASTER_CLK>; clock-names = "ref"; #phy-cells = <0>; - - status = "disabled"; }; - usb3_0: usb30@0 { - compatible = "qcom,dwc3"; + usb3_0: usb3@110f8800 { + compatible = "qcom,dwc3", "syscon"; #address-cells = <1>; #size-cells = <1>; + reg = <0x110f8800 0x8000>; clocks = <&gcc USB30_0_MASTER_CLK>; clock-names = "core"; ranges; resets = <&gcc USB30_0_MASTER_RESET>; - reset-names = "usb30_0_mstr_rst"; + reset-names = "master"; status = "disabled"; dwc3_0: dwc3@11000000 { compatible = "snps,dwc3"; reg = <0x11000000 0xcd00>; - interrupts = <0 110 0x4>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; phys = <&hs_phy_0>, <&ss_phy_0>; phy-names = "usb2-phy", "usb3-phy"; dr_mode = "host"; @@ -985,24 +962,41 @@ }; }; - usb3_1: usb30@1 { - compatible = "qcom,dwc3"; + hs_phy_1: hs_phy_1 { + compatible = "qcom,dwc3-hs-usb-phy"; + regmap = <&usb3_1>; + clocks = <&gcc USB30_1_UTMI_CLK>; + clock-names = "ref"; + #phy-cells = <0>; + }; + + ss_phy_1: ss_phy_1 { + compatible = "qcom,dwc3-ss-usb-phy"; + regmap = <&usb3_1>; + clocks = <&gcc USB30_1_MASTER_CLK>; + clock-names = "ref"; + #phy-cells = <0>; + }; + + usb3_1: usb3@100f8800 { + compatible = "qcom,dwc3", "syscon"; #address-cells = <1>; #size-cells = <1>; + reg = <0x100f8800 0x8000>; clocks = <&gcc USB30_1_MASTER_CLK>; clock-names = "core"; ranges; resets = <&gcc USB30_1_MASTER_RESET>; - reset-names = "usb30_1_mstr_rst"; + reset-names = "master"; status = "disabled"; dwc3_1: dwc3@10000000 { compatible = "snps,dwc3"; reg = <0x10000000 0xcd00>; - interrupts = <0 205 0x4>; + interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; phys = <&hs_phy_1>, <&ss_phy_1>; phy-names = "usb2-phy", "usb3-phy"; dr_mode = "host"; |