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| author | Nick Hainke <vincent@systemli.org> | 2021-12-27 02:17:43 +0100 |
|---|---|---|
| committer | Christian Lamparter <chunkeey@gmail.com> | 2021-12-29 22:55:16 +0100 |
| commit | 83b5fbddf28e943e8c90b4099a1e36d158f5995c (patch) | |
| tree | ebfdbe3be27d8238e7a48f669f41b84d46b8bf5a /target/linux/ipq806x/base-files | |
| parent | 6bfc8bb4a37903bd1d3bb7e7824d89f3a2cca6a1 (diff) | |
| download | upstream-83b5fbddf28e943e8c90b4099a1e36d158f5995c.tar.gz upstream-83b5fbddf28e943e8c90b4099a1e36d158f5995c.tar.bz2 upstream-83b5fbddf28e943e8c90b4099a1e36d158f5995c.zip | |
kernel: 5.10: add patches to fix macronix flash
mtd: spi-nor: locking support for MX25L6405D
Macronix MX25L6405D supports locking with four block-protection bits.
Currently, the driver only sets three bits. If the bootloader does not
sustain the flash chip in an unlocked state, the flash might be
non-writeable. Add the corresponding flag to enable locking support with
four bits in the status register.
mtd: spi-nor: disable 16-bit-sr for macronix
Macronix flash chips seem to consist of only one status register.
These chips will not work with the "16-bit Write Status (01h) Command".
Disable SNOR_F_HAS_16BIT_SR for all Macronix chips.
Refreshed:
- 0052-mtd-spi-nor-use-4-bit-locking-for-MX25L12805D.patch
Fixes: 15aa53d7ee65 ("ath79: switch to Kernel 5.10")
Signed-off-by: Nick Hainke <vincent@systemli.org>
Diffstat (limited to 'target/linux/ipq806x/base-files')
0 files changed, 0 insertions, 0 deletions