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author | Robert Marko <robimarko@gmail.com> | 2018-12-17 10:39:09 +0100 |
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committer | Christian Lamparter <chunkeey@gmail.com> | 2018-12-27 14:06:38 +0100 |
commit | 8b7abea2f6e9dc1a37fd671c696376f16bcea95c (patch) | |
tree | 8c00af1b401f1f306bbcce7c83fb1474de096180 /target/linux/ipq40xx/patches-4.19/702-dts-ipq4019-add-PHY-switch-nodes.patch | |
parent | 96b69c2e9a81277617274c251e2fc16a0554d0a9 (diff) | |
download | upstream-8b7abea2f6e9dc1a37fd671c696376f16bcea95c.tar.gz upstream-8b7abea2f6e9dc1a37fd671c696376f16bcea95c.tar.bz2 upstream-8b7abea2f6e9dc1a37fd671c696376f16bcea95c.zip |
ipq40xx: Add patches for 4.19
This adds the necessary patches for 4.19 kernel.
Upstreamed patches were dropped, backported upstreamed patches
from 4.20.
Drop Winbond ID patch since that NAND IC was upstreamed to use
SPI-NAND framework and support for it was backported from 4.20.
Rework ESSEDMA patches to compile under 4.19 due to timer changes,
Clément Péron did the hard work and his changes were taken from the
initial 4.19 PR.
MR33 changes had to be manually refreshed to apply.
Refresh other patches to apply.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove
Diffstat (limited to 'target/linux/ipq40xx/patches-4.19/702-dts-ipq4019-add-PHY-switch-nodes.patch')
-rw-r--r-- | target/linux/ipq40xx/patches-4.19/702-dts-ipq4019-add-PHY-switch-nodes.patch | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/target/linux/ipq40xx/patches-4.19/702-dts-ipq4019-add-PHY-switch-nodes.patch b/target/linux/ipq40xx/patches-4.19/702-dts-ipq4019-add-PHY-switch-nodes.patch new file mode 100644 index 0000000000..03da6c863a --- /dev/null +++ b/target/linux/ipq40xx/patches-4.19/702-dts-ipq4019-add-PHY-switch-nodes.patch @@ -0,0 +1,46 @@ +From 9deeec35dd3b628b95624e41d4e04acf728991ba Mon Sep 17 00:00:00 2001 +From: Christian Lamparter <chunkeey@gmail.com> +Date: Sun, 20 Nov 2016 02:20:54 +0100 +Subject: [PATCH] dts: ipq4019: add PHY/switch nodes + +This patch adds both the "qcom,ess-switch" and "qcom,ess-psgmii" +nodes which are needed for the ar40xx.c driver to initialize the +switch. + +Signed-off-by: Christian Lamparter <chunkeey@gmail.com> +--- + arch/arm/boot/dts/qcom-ipq4019.dtsi | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -594,6 +594,29 @@ + }; + }; + ++ ess-switch@c000000 { ++ compatible = "qcom,ess-switch"; ++ reg = <0xc000000 0x80000>; ++ switch_access_mode = "local bus"; ++ resets = <&gcc ESS_RESET>; ++ reset-names = "ess_rst"; ++ clocks = <&gcc GCC_ESS_CLK>; ++ clock-names = "ess_clk"; ++ switch_cpu_bmp = <0x1>; ++ switch_lan_bmp = <0x1e>; ++ switch_wan_bmp = <0x20>; ++ switch_mac_mode = <0>; /* PORT_WRAPPER_PSGMII */ ++ switch_initvlas = <0x7c 0x54>; ++ status = "disabled"; ++ }; ++ ++ ess-psgmii@98000 { ++ compatible = "qcom,ess-psgmii"; ++ reg = <0x98000 0x800>; ++ psgmii_access_mode = "local bus"; ++ status = "disabled"; ++ }; ++ + usb3_ss_phy: ssphy@9a000 { + compatible = "qcom,usb-ss-ipq4019-phy"; + #phy-cells = <0>; |