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authorRobert Marko <robimarko@gmail.com>2018-12-17 10:39:09 +0100
committerChristian Lamparter <chunkeey@gmail.com>2018-12-27 14:06:38 +0100
commit8b7abea2f6e9dc1a37fd671c696376f16bcea95c (patch)
tree8c00af1b401f1f306bbcce7c83fb1474de096180 /target/linux/ipq40xx/patches-4.19/303-spi-nor-enable-4B-opcodes-for-mx25l25635f.patch
parent96b69c2e9a81277617274c251e2fc16a0554d0a9 (diff)
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ipq40xx: Add patches for 4.19
This adds the necessary patches for 4.19 kernel. Upstreamed patches were dropped, backported upstreamed patches from 4.20. Drop Winbond ID patch since that NAND IC was upstreamed to use SPI-NAND framework and support for it was backported from 4.20. Rework ESSEDMA patches to compile under 4.19 due to timer changes, Clément Péron did the hard work and his changes were taken from the initial 4.19 PR. MR33 changes had to be manually refreshed to apply. Refresh other patches to apply. Signed-off-by: Robert Marko <robimarko@gmail.com> Remove
Diffstat (limited to 'target/linux/ipq40xx/patches-4.19/303-spi-nor-enable-4B-opcodes-for-mx25l25635f.patch')
-rw-r--r--target/linux/ipq40xx/patches-4.19/303-spi-nor-enable-4B-opcodes-for-mx25l25635f.patch62
1 files changed, 62 insertions, 0 deletions
diff --git a/target/linux/ipq40xx/patches-4.19/303-spi-nor-enable-4B-opcodes-for-mx25l25635f.patch b/target/linux/ipq40xx/patches-4.19/303-spi-nor-enable-4B-opcodes-for-mx25l25635f.patch
new file mode 100644
index 0000000000..eae2fd9470
--- /dev/null
+++ b/target/linux/ipq40xx/patches-4.19/303-spi-nor-enable-4B-opcodes-for-mx25l25635f.patch
@@ -0,0 +1,62 @@
+--- a/drivers/mtd/spi-nor/spi-nor.c
++++ b/drivers/mtd/spi-nor/spi-nor.c
+@@ -1091,6 +1091,7 @@ static const struct flash_info spi_nor_i
+ { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
+ { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
+ { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
++ { "mx25l25635f", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+ { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
+ { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
+ { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+@@ -1273,11 +1274,12 @@ static const struct flash_info spi_nor_i
+ { },
+ };
+
+-static const struct flash_info *spi_nor_read_id(struct spi_nor *nor)
++static const struct flash_info *spi_nor_read_id(struct spi_nor *nor,
++ const char *name)
+ {
+ int tmp;
+ u8 id[SPI_NOR_MAX_ID_LEN];
+- const struct flash_info *info;
++ const struct flash_info *info, *first_match = NULL;
+
+ tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
+ if (tmp < 0) {
+@@ -1288,10 +1290,16 @@ static const struct flash_info *spi_nor_
+ for (tmp = 0; tmp < ARRAY_SIZE(spi_nor_ids) - 1; tmp++) {
+ info = &spi_nor_ids[tmp];
+ if (info->id_len) {
+- if (!memcmp(info->id, id, info->id_len))
+- return &spi_nor_ids[tmp];
++ if (!memcmp(info->id, id, info->id_len)) {
++ if (!name || !strcmp(name, info->name))
++ return info;
++ if (!first_match)
++ first_match = info;
++ }
+ }
+ }
++ if (first_match)
++ return first_match;
+ dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
+ id[0], id[1], id[2]);
+ return ERR_PTR(-ENODEV);
+@@ -2825,7 +2833,7 @@ int spi_nor_scan(struct spi_nor *nor, co
+ info = spi_nor_match_id(name);
+ /* Try to auto-detect if chip name wasn't specified or not found */
+ if (!info)
+- info = spi_nor_read_id(nor);
++ info = spi_nor_read_id(nor, NULL);
+ if (IS_ERR_OR_NULL(info))
+ return -ENOENT;
+
+@@ -2836,7 +2844,7 @@ int spi_nor_scan(struct spi_nor *nor, co
+ if (name && info->id_len) {
+ const struct flash_info *jinfo;
+
+- jinfo = spi_nor_read_id(nor);
++ jinfo = spi_nor_read_id(nor, name);
+ if (IS_ERR(jinfo)) {
+ return PTR_ERR(jinfo);
+ } else if (jinfo != info) {