ipq40xx: use patches that were sent upstream

Signed-off-by: John Crispin <john@phrozen.org>

1 files changed, 0 insertions, 349 deletions

diff --git a/target/linux/ipq40xx/patches-4.14/306-qcom-ipq4019-add-USB-nodes-to-ipq4019-SoC-device-tre.patch b/target/linux/ipq40xx/patches-4.14/306-qcom-ipq4019-add-USB-nodes-to-ipq4019-SoC-device-tre.patch
deleted file mode 100644
index ee2beaa64d..0000000000
--- a/target/linux/ipq40xx/patches-4.14/306-qcom-ipq4019-add-USB-nodes-to-ipq4019-SoC-device-tre.patch
+++ /dev/null
@@ -1,349 +0,0 @@
-From ea5f4d6f4716f3a0bb4fc3614b7a0e8c0df1cb81 Mon Sep 17 00:00:00 2001
-From: Matthew McClintock <mmcclint@codeaurora.org>
-Date: Thu, 17 Mar 2016 16:22:28 -0500
-Subject: [PATCH] qcom: ipq4019: add USB nodes to ipq4019 SoC device tree
-
-This adds the SoC nodes to the ipq4019 device tree and
-enable it for the DK01.1 board.
-
-Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
-Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
----
-Changes:
-	- replaced space with tab
-	- added sleep and mock_utmi clocks
-	- added registers for usb2 and usb3 parent node
-	- changed compatible to qca,ipa4019-dwc3
-	- updated usb2 and usb3 names
-	  (included the reg - in case they become necessary later)
----
- arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 ++++++++
- arch/arm/boot/dts/qcom-ipq4019.dtsi           | 71 +++++++++++++++++++++++++++
- 2 files changed, 91 insertions(+)
-
---- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
-@@ -101,5 +101,25 @@
- 		wifi@a800000 {
- 			status = "ok";
- 		};
-+
-+		usb3_ss_phy: ssphy@9a000 {
-+			status = "ok";
-+		};
-+
-+		usb3_hs_phy: hsphy@a6000 {
-+			status = "ok";
-+		};
-+
-+		usb3: usb3@8af8800 {
-+			status = "ok";
-+		};
-+
-+		usb2_hs_phy: hsphy@a8000 {
-+			status = "ok";
-+		};
-+
-+		usb2: usb2@60f8800 {
-+			status = "ok";
-+		};
- 	};
- };
---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -539,5 +539,79 @@
- 					  "legacy";
- 			status = "disabled";
- 		};
-+
-+		usb3_ss_phy: ssphy@9a000 {
-+			compatible = "qcom,usb-ss-ipq4019-phy";
-+			#phy-cells = <0>;
-+			reg = <0x9a000 0x800>;
-+			reg-names = "phy_base";
-+			resets = <&gcc USB3_UNIPHY_PHY_ARES>;
-+			reset-names = "por_rst";
-+			status = "disabled";
-+		};
-+
-+		usb3_hs_phy: hsphy@a6000 {
-+			compatible = "qcom,usb-hs-ipq4019-phy";
-+			#phy-cells = <0>;
-+			reg = <0xa6000 0x40>;
-+			reg-names = "phy_base";
-+			resets = <&gcc USB3_HSPHY_POR_ARES>, <&gcc USB3_HSPHY_S_ARES>;
-+			reset-names = "por_rst", "srif_rst";
-+			status = "disabled";
-+		};
-+
-+		usb3@8af8800 {
-+			compatible = "qcom,dwc3";
-+			reg = <0x8af8800 0x100>;
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+			clocks = <&gcc GCC_USB3_MASTER_CLK>,
-+				 <&gcc GCC_USB3_SLEEP_CLK>,
-+				 <&gcc GCC_USB3_MOCK_UTMI_CLK>;
-+			clock-names = "master", "sleep", "mock_utmi";
-+			ranges;
-+			status = "disabled";
-+
-+			dwc3@8a00000 {
-+				compatible = "snps,dwc3";
-+				reg = <0x8a00000 0xf8000>;
-+				interrupts = <0 132 0>;
-+				phys = <&usb3_hs_phy>, <&usb3_ss_phy>;
-+				phy-names = "usb2-phy", "usb3-phy";
-+				dr_mode = "host";
-+			};
-+		};
-+
-+		usb2_hs_phy: hsphy@a8000 {
-+			compatible = "qcom,usb-hs-ipq4019-phy";
-+			#phy-cells = <0>;
-+			reg = <0xa8000 0x40>;
-+			reg-names = "phy_base";
-+			resets = <&gcc USB2_HSPHY_POR_ARES>, <&gcc USB2_HSPHY_S_ARES>;
-+			reset-names = "por_rst", "srif_rst";
-+			status = "disabled";
-+		};
-+
-+		usb2@60f8800 {
-+			compatible = "qcom,dwc3";
-+			reg = <0x60f8800 0x100>;
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+			clocks = <&gcc GCC_USB2_MASTER_CLK>,
-+				 <&gcc GCC_USB2_SLEEP_CLK>,
-+				 <&gcc GCC_USB2_MOCK_UTMI_CLK>;
-+			clock-names = "master", "sleep", "mock_utmi";
-+			ranges;
-+			status = "disabled";
-+
-+			dwc3@6000000 {
-+				compatible = "snps,dwc3";
-+				reg = <0x6000000 0xf8000>;
-+				interrupts = <0 136 0>;
-+				phys = <&usb2_hs_phy>;
-+				phy-names = "usb2-phy";
-+				dr_mode = "host";
-+			};
-+		};
- 	};
- };
---- a/drivers/phy/qualcomm/Kconfig
-+++ b/drivers/phy/qualcomm/Kconfig
-@@ -8,6 +8,13 @@ config PHY_QCOM_APQ8064_SATA
- 	depends on OF
- 	select GENERIC_PHY
- 
-+config PHY_QCOM_IPQ4019_USB
-+	tristate "Qualcomm IPQ4019 USB PHY module"
-+	depends on OF && ARCH_QCOM
-+	select GENERIC_PHY
-+	help
-+	  Support for the USB PHY on QCOM IPQ4019/Dakota chipsets.
-+
- config PHY_QCOM_IPQ806X_SATA
- 	tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
- 	depends on ARCH_QCOM
---- a/drivers/phy/qualcomm/Makefile
-+++ b/drivers/phy/qualcomm/Makefile
-@@ -1,5 +1,6 @@
- # SPDX-License-Identifier: GPL-2.0
- obj-$(CONFIG_PHY_QCOM_APQ8064_SATA)	+= phy-qcom-apq8064-sata.o
-+obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) 	+= phy-qcom-ipq4019-usb.o
- obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA)	+= phy-qcom-ipq806x-sata.o
- obj-$(CONFIG_PHY_QCOM_QMP)		+= phy-qcom-qmp.o
- obj-$(CONFIG_PHY_QCOM_QUSB2)		+= phy-qcom-qusb2.o
---- /dev/null
-+++ b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
-@@ -0,0 +1,188 @@
-+/*
-+ * Copyright (C) 2018 John Crispin <john@phrozen.org>
-+ *
-+ * Based on code from
-+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/delay.h>
-+#include <linux/err.h>
-+#include <linux/io.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/mutex.h>
-+#include <linux/of_platform.h>
-+#include <linux/phy/phy.h>
-+#include <linux/platform_device.h>
-+#include <linux/reset.h>
-+
-+/*
-+ * Magic registers copied from the SDK driver code
-+ */
-+#define PHY_CTRL0_ADDR	0x000
-+#define PHY_CTRL1_ADDR	0x004
-+#define PHY_CTRL2_ADDR	0x008
-+#define PHY_CTRL3_ADDR	0x00C
-+#define PHY_CTRL4_ADDR	0x010
-+#define PHY_MISC_ADDR	0x024
-+#define PHY_IPG_ADDR	0x030
-+
-+#define PHY_CTRL0_VAL	0xA4600015
-+#define PHY_CTRL1_VAL	0x09500000
-+#define PHY_CTRL2_VAL	0x00058180
-+#define PHY_CTRL3_VAL	0x6DB6DCD6
-+#define PHY_CTRL4_VAL	0x836DB6DB
-+#define PHY_MISC_VAL	0x3803FB0C
-+#define PHY_IPG_VAL	0x47323232
-+
-+struct ipq4019_usb_phy {
-+	struct device		*dev;
-+	struct phy		*phy;
-+	void __iomem		*base;
-+	struct reset_control	*por_rst;
-+	struct reset_control	*srif_rst;
-+};
-+
-+static int ipq4019_ss_phy_power_off(struct phy *_phy)
-+{
-+	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
-+
-+	reset_control_assert(phy->por_rst);
-+	msleep(10);
-+
-+	return 0;
-+}
-+
-+static int ipq4019_ss_phy_power_on(struct phy *_phy)
-+{
-+	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
-+
-+	ipq4019_ss_phy_power_off(_phy);
-+
-+	reset_control_deassert(phy->por_rst);
-+
-+	return 0;
-+}
-+
-+static struct phy_ops ipq4019_usb_ss_phy_ops = {
-+	.power_on	= ipq4019_ss_phy_power_on,
-+	.power_off	= ipq4019_ss_phy_power_off,
-+};
-+
-+static int ipq4019_hs_phy_power_off(struct phy *_phy)
-+{
-+	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
-+
-+	reset_control_assert(phy->por_rst);
-+	msleep(10);
-+
-+	reset_control_assert(phy->srif_rst);
-+	msleep(10);
-+
-+	return 0;
-+}
-+
-+static int ipq4019_hs_phy_power_on(struct phy *_phy)
-+{
-+	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
-+
-+	ipq4019_hs_phy_power_off(_phy);
-+
-+	reset_control_deassert(phy->srif_rst);
-+	msleep(10);
-+
-+	writel(PHY_CTRL0_VAL, phy->base + PHY_CTRL0_ADDR);
-+	writel(PHY_CTRL1_VAL, phy->base + PHY_CTRL1_ADDR);
-+	writel(PHY_CTRL2_VAL, phy->base + PHY_CTRL2_ADDR);
-+	writel(PHY_CTRL3_VAL, phy->base + PHY_CTRL3_ADDR);
-+	writel(PHY_CTRL4_VAL, phy->base + PHY_CTRL4_ADDR);
-+	writel(PHY_MISC_VAL, phy->base + PHY_MISC_ADDR);
-+	writel(PHY_IPG_VAL, phy->base + PHY_IPG_ADDR);
-+	msleep(10);
-+
-+	reset_control_deassert(phy->por_rst);
-+
-+	return 0;
-+}
-+
-+static struct phy_ops ipq4019_usb_hs_phy_ops = {
-+	.power_on	= ipq4019_hs_phy_power_on,
-+	.power_off	= ipq4019_hs_phy_power_off,
-+};
-+
-+static const struct of_device_id ipq4019_usb_phy_of_match[] = {
-+	{ .compatible = "qcom,usb-hs-ipq4019-phy", .data = &ipq4019_usb_hs_phy_ops},
-+	{ .compatible = "qcom,usb-ss-ipq4019-phy", .data = &ipq4019_usb_ss_phy_ops},
-+	{ },
-+};
-+MODULE_DEVICE_TABLE(of, ipq4019_usb_phy_of_match);
-+
-+static int ipq4019_usb_phy_probe(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+	struct resource *res;
-+	struct phy_provider *phy_provider;
-+	struct ipq4019_usb_phy *phy;
-+	const struct of_device_id *match;
-+
-+	match = of_match_device(ipq4019_usb_phy_of_match, &pdev->dev);
-+	if (!match)
-+		return -ENODEV;
-+
-+	phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
-+	if (!phy)
-+		return -ENOMEM;
-+
-+	phy->dev = &pdev->dev;
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	phy->base = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(phy->base)) {
-+		dev_err(dev, "failed to remap register memory\n");
-+		return PTR_ERR(phy->base);
-+	}
-+
-+	phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
-+	if (IS_ERR(phy->por_rst)) {
-+		if (PTR_ERR(phy->por_rst) != -EPROBE_DEFER)
-+			dev_err(dev, "POR reset is missing\n");
-+		return PTR_ERR(phy->por_rst);
-+	}
-+
-+	phy->srif_rst = devm_reset_control_get_optional(phy->dev, "srif_rst");
-+	if (IS_ERR(phy->srif_rst))
-+		return PTR_ERR(phy->srif_rst);
-+
-+	phy->phy = devm_phy_create(dev, NULL, match->data);
-+	if (IS_ERR(phy->phy)) {
-+		dev_err(dev, "failed to create PHY\n");
-+		return PTR_ERR(phy->phy);
-+	}
-+	phy_set_drvdata(phy->phy, phy);
-+
-+	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
-+
-+	return PTR_ERR_OR_ZERO(phy_provider);
-+}
-+
-+static struct platform_driver ipq4019_usb_phy_driver = {
-+	.probe	= ipq4019_usb_phy_probe,
-+	.driver = {
-+		.of_match_table	= ipq4019_usb_phy_of_match,
-+		.name  = "ipq4019-usb-phy",
-+	}
-+};
-+module_platform_driver(ipq4019_usb_phy_driver);
-+
-+MODULE_DESCRIPTION("QCOM/IPQ4019 USB phy driver");
-+MODULE_AUTHOR("John Crispin <john@phrozen.org>");
-+MODULE_LICENSE("GPL v2");