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authorKoen Vandeputte <koen.vandeputte@ncentric.com>2019-02-20 16:02:26 +0100
committerKoen Vandeputte <koen.vandeputte@ncentric.com>2019-02-22 10:53:42 +0100
commit3a2668c6d5111d0f98922157b204263cef8603d7 (patch)
treebcdb8e7f3b5a231fc346dc7c2ee14b4c98131299 /target/linux/ipq40xx/patches-4.14/080-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch
parent8f980a8cfec48ea9290c094c6818c125fe05eec7 (diff)
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kernel: bump 4.14 to 4.14.102
Refreshed all patches. Remove upstreamed: - 272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch Remove upstreamed hunks: - 080-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch Fixes: - CVE-2018-1000026 Compile-tested on: ar71xx, cns3xxx, imx6, x86_64 Runtime-tested on: ar71xx, cns3xxx, imx6 Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Diffstat (limited to 'target/linux/ipq40xx/patches-4.14/080-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch')
-rw-r--r--target/linux/ipq40xx/patches-4.14/080-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch32
1 files changed, 0 insertions, 32 deletions
diff --git a/target/linux/ipq40xx/patches-4.14/080-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch b/target/linux/ipq40xx/patches-4.14/080-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch
index cffcd6c76c..81b13e6b2c 100644
--- a/target/linux/ipq40xx/patches-4.14/080-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch
+++ b/target/linux/ipq40xx/patches-4.14/080-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch
@@ -69,35 +69,3 @@ Origin: other, https://patchwork.kernel.org/patch/10339127/
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
---- a/drivers/pinctrl/qcom/pinctrl-msm.c
-+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
-@@ -839,11 +839,24 @@ static int msm_gpio_init(struct msm_pinc
- return ret;
- }
-
-- ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev), 0, 0, chip->ngpio);
-- if (ret) {
-- dev_err(pctrl->dev, "Failed to add pin range\n");
-- gpiochip_remove(&pctrl->chip);
-- return ret;
-+ /*
-+ * For DeviceTree-supported systems, the gpio core checks the
-+ * pinctrl's device node for the "gpio-ranges" property.
-+ * If it is present, it takes care of adding the pin ranges
-+ * for the driver. In this case the driver can skip ahead.
-+ *
-+ * In order to remain compatible with older, existing DeviceTree
-+ * files which don't set the "gpio-ranges" property or systems that
-+ * utilize ACPI the driver has to call gpiochip_add_pin_range().
-+ */
-+ if (!of_property_read_bool(pctrl->dev->of_node, "gpio-ranges")) {
-+ ret = gpiochip_add_pin_range(&pctrl->chip,
-+ dev_name(pctrl->dev), 0, 0, chip->ngpio);
-+ if (ret) {
-+ dev_err(pctrl->dev, "Failed to add pin range\n");
-+ gpiochip_remove(&pctrl->chip);
-+ return ret;
-+ }
- }
-
- ret = gpiochip_irqchip_add(chip,