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authorJohn Crispin <john@phrozen.org>2018-07-24 14:38:57 +0200
committerJohn Crispin <john@phrozen.org>2018-07-25 12:13:18 +0200
commit95672e04335ea0d7d8f468cec8f63d593cc6ede6 (patch)
treeccd1420a003235f2c495c90f7cbc888d236f979b /target/linux/ipq40xx/patches-4.14/017-qcom-ipq4019-add-cpu-operating-points-for-cpufreq-su.patch
parente8c58e7ddd29df41a26b20e0930292d911f5f788 (diff)
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ipq40xx: use patches that were sent upstream
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/ipq40xx/patches-4.14/017-qcom-ipq4019-add-cpu-operating-points-for-cpufreq-su.patch')
-rw-r--r--target/linux/ipq40xx/patches-4.14/017-qcom-ipq4019-add-cpu-operating-points-for-cpufreq-su.patch77
1 files changed, 0 insertions, 77 deletions
diff --git a/target/linux/ipq40xx/patches-4.14/017-qcom-ipq4019-add-cpu-operating-points-for-cpufreq-su.patch b/target/linux/ipq40xx/patches-4.14/017-qcom-ipq4019-add-cpu-operating-points-for-cpufreq-su.patch
deleted file mode 100644
index 03e9021a42..0000000000
--- a/target/linux/ipq40xx/patches-4.14/017-qcom-ipq4019-add-cpu-operating-points-for-cpufreq-su.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 18c3b42575a154343831aec0637aab00e19440e1 Mon Sep 17 00:00:00 2001
-From: Matthew McClintock <mmcclint@codeaurora.org>
-Date: Thu, 17 Mar 2016 15:01:09 -0500
-Subject: [PATCH 17/69] qcom: ipq4019: add cpu operating points for cpufreq
- support
-
-This adds some operating points for cpu frequeny scaling
-
-Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
----
- arch/arm/boot/dts/qcom-ipq4019.dtsi | 34 ++++++++++++++++++++++++++--------
- 1 file changed, 26 insertions(+), 8 deletions(-)
-
---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -40,14 +40,7 @@
- reg = <0x0>;
- clocks = <&gcc GCC_APPS_CLK_SRC>;
- clock-frequency = <0>;
-- operating-points = <
-- /* kHz uV (fixed) */
-- 48000 1100000
-- 200000 1100000
-- 500000 1100000
-- 666000 1100000
-- >;
-- clock-latency = <256000>;
-+ operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu@1 {
-@@ -59,6 +52,7 @@
- reg = <0x1>;
- clocks = <&gcc GCC_APPS_CLK_SRC>;
- clock-frequency = <0>;
-+ operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu@2 {
-@@ -70,6 +64,7 @@
- reg = <0x2>;
- clocks = <&gcc GCC_APPS_CLK_SRC>;
- clock-frequency = <0>;
-+ operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu@3 {
-@@ -81,6 +76,29 @@
- reg = <0x3>;
- clocks = <&gcc GCC_APPS_CLK_SRC>;
- clock-frequency = <0>;
-+ operating-points-v2 = <&cpu0_opp_table>;
-+ };
-+ };
-+
-+ cpu0_opp_table: opp_table0 {
-+ compatible = "operating-points-v2";
-+ opp-shared;
-+
-+ opp-48000000 {
-+ opp-hz = /bits/ 64 <48000000>;
-+ clock-latency-ns = <256000>;
-+ };
-+ opp-200000000 {
-+ opp-hz = /bits/ 64 <200000000>;
-+ clock-latency-ns = <256000>;
-+ };
-+ opp-500000000 {
-+ opp-hz = /bits/ 64 <500000000>;
-+ clock-latency-ns = <256000>;
-+ };
-+ opp-716000000 {
-+ opp-hz = /bits/ 64 <716000000>;
-+ clock-latency-ns = <256000>;
- };
- };
-