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authorDongming Han <handongming@gl-inet.com>2020-04-08 16:43:51 +0800
committerPetr Štetiar <ynezz@true.cz>2020-07-08 16:07:05 +0200
commitf103321349182d5fef5a1b846f017db32005da87 (patch)
tree676da18dceaf83d292a8d7814059277ae93b5e39 /target/linux/ipq40xx/files/arch
parentb88f8202c4ced971de26268597d2e798ecdc0ba2 (diff)
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ipq40xx: add support for GL.iNet GL-S1300
Specifications: SOC: Qualcomm IPQ4029 (DAKOTA) ARM Quad-Core RAM: 512 MiB FLASH1: 16 MiB NOR - SPI0 FLASH2: 8 GiB eMMC ETH: Qualcomm QCA8075 WLAN1: Qualcomm Atheros QCA4029 2.4GHz 802.11b/g/n 2x2 WLAN2: Qualcomm Atheros QCA4029 5GHz 802.11n/ac W2 2x2 INPUT: Reset, WPS LED: Power, Mesh, WLAN UART1: On board pin header near to LED (3.3V, TX, RX, GND), 3.3V without pin - 115200 8N1 UART2: On board with BLE module SPI1: On board socket for Zigbee module Install via tftp - NB: need to flash transition image firstly Firstly install transition image: (IPQ40xx) # tftpboot 0x84000000 s1300-factory-to-openwrt.img (IPQ40xx) # sf probe && imgaddr=0x84000000 && source :script Secondly install openwrt sysupgrade bin: (IPQ40xx) # run lf Revert to factory image: (IPQ40xx) # tftpboot 0x84000000 s1300-openwrt-to-factory.img (IPQ40xx) # sf probe && imgaddr=0x84000000 && source :script The kernel and rootfs of factory firmware are on eMMC, and openwrt firmware is on NOR flash. The transition image includes U-boot and partition table, which decides where to load kernel and rootfs. After you firstly install openwrt image, you can switch between factory and openwrt firmware by flashing transition image. Signed-off-by: Dongming Han <handongming@gl-inet.com>
Diffstat (limited to 'target/linux/ipq40xx/files/arch')
-rw-r--r--target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts356
1 files changed, 356 insertions, 0 deletions
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts
new file mode 100644
index 0000000000..3457ebebfe
--- /dev/null
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts
@@ -0,0 +1,356 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+
+#include "qcom-ipq4019.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/soc/qcom,tcsr.h>
+
+/ {
+ model = "GL.iNet GL-S1300";
+ compatible = "glinet,gl-s1300";
+
+ aliases {
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_power;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x10000000>;
+ };
+
+ soc {
+ rng@22000 {
+ status = "okay";
+ };
+
+ mdio@90000 {
+ status = "okay";
+ };
+
+ ess-psgmii@98000 {
+ status = "okay";
+ };
+
+ tcsr@1949000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1949000 0x100>;
+ qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+ };
+
+ tcsr@194b000 {
+ /* select hostmode */
+ compatible = "qcom,tcsr";
+ reg = <0x194b000 0x100>;
+ qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+ status = "okay";
+ };
+
+ ess_tcsr@1953000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1953000 0x1000>;
+ qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+ };
+
+ tcsr@1957000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1957000 0x100>;
+ qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+ };
+
+ usb2@60f8800 {
+ status = "okay";
+ };
+
+ usb3@8af8800 {
+ status = "okay";
+ };
+
+ crypto@8e3a000 {
+ status = "okay";
+ };
+
+ watchdog@b017000 {
+ status = "okay";
+ };
+
+ ess-switch@c000000 {
+ status = "okay";
+ switch_lan_bmp = <0x18>;
+ switch_wan_bmp = <0x20>;
+ };
+
+ edma@c080000 {
+ status = "okay";
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ wps {
+ label = "wps";
+ gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_WPS_BUTTON>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_power: power {
+ label = "gl-s1300:green:power";
+ gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ mesh {
+ label = "gl-s1300:green:mesh";
+ gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>;
+ };
+
+ wlan {
+ label = "gl-s1300:green:wlan";
+ gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "phy0tpt";
+ };
+ };
+};
+
+&vqmmc {
+ status = "okay";
+};
+
+&sdhci {
+ status = "okay";
+ pinctrl-0 = <&sd_pins>;
+ pinctrl-names = "default";
+ cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
+ vqmmc-supply = <&vqmmc>;
+};
+
+&blsp_dma {
+ status = "okay";
+};
+
+&cryptobam {
+ status = "okay";
+};
+
+&blsp1_spi1 {
+ pinctrl-0 = <&spi_0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ SBL1@0 {
+ label = "SBL1";
+ reg = <0x0 0x40000>;
+ read-only;
+ };
+
+ MIBIB@40000 {
+ label = "MIBIB";
+ reg = <0x40000 0x20000>;
+ read-only;
+ };
+
+ QSEE@60000 {
+ label = "QSEE";
+ reg = <0x60000 0x60000>;
+ read-only;
+ };
+
+ CDT@c0000 {
+ label = "CDT";
+ reg = <0xc0000 0x10000>;
+ read-only;
+ };
+
+ DDRPARAMS@d0000 {
+ label = "DDRPARAMS";
+ reg = <0xd0000 0x10000>;
+ read-only;
+ };
+
+ APPSBLENV@e0000 {
+ label = "APPSBLENV";
+ reg = <0xe0000 0x10000>;
+ read-only;
+ };
+
+ APPSBL@f0000 {
+ label = "APPSBL";
+ reg = <0xf0000 0x80000>;
+ read-only;
+ };
+
+ ART@170000 {
+ label = "ART";
+ reg = <0x170000 0x10000>;
+ read-only;
+ };
+
+ firmware@180000 {
+ compatible = "denx,fit";
+ label = "firmware";
+ reg = <0x180000 0xe80000>;
+ };
+ };
+ };
+};
+
+&blsp1_spi2 {
+ pinctrl-0 = <&spi_1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ spidev1: spi@1 {
+ compatible = "siliconlabs,si3210";
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+ };
+};
+
+&blsp1_uart1 {
+ pinctrl-0 = <&serial_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&blsp1_uart2 {
+ pinctrl-0 = <&serial_1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&tlmm {
+ serial_pins: serial_pinmux {
+ mux {
+ pins = "gpio16", "gpio17";
+ function = "blsp_uart0";
+ bias-disable;
+ };
+ };
+
+ serial_1_pins: serial1_pinmux {
+ mux {
+ pins = "gpio8", "gpio9",
+ "gpio10", "gpio11";
+ function = "blsp_uart1";
+ bias-disable;
+ };
+ };
+
+ spi_0_pins: spi_0_pinmux {
+ pinmux {
+ function = "blsp_spi0";
+ pins = "gpio13", "gpio14", "gpio15";
+ };
+ pinmux_cs {
+ function = "gpio";
+ pins = "gpio12";
+ };
+ pinconf {
+ pins = "gpio13", "gpio14", "gpio15";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio12";
+ drive-strength = <2>;
+ bias-disable;
+ output-high;
+ };
+ };
+
+ spi_1_pins: spi_1_pinmux {
+ mux {
+ pins = "gpio44", "gpio46", "gpio47";
+ function = "blsp_spi1";
+ bias-disable;
+ };
+ host_int {
+ pins = "gpio42";
+ function = "gpio";
+ input;
+ };
+ cs {
+ pins = "gpio45";
+ function = "gpio";
+ bias-pull-up;
+ };
+ wake {
+ pins = "gpio40";
+ function = "gpio";
+ output-high;
+ };
+ reset {
+ pins = "gpio49";
+ function = "gpio";
+ output-high;
+ };
+ };
+
+ sd_pins: sd_pins {
+ pinmux {
+ function = "sdio";
+ pins = "gpio23", "gpio24", "gpio25", "gpio26",
+ "gpio28", "gpio29", "gpio30", "gpio31";
+ drive-strength = <10>;
+ };
+
+ pinmux_sd_clk {
+ function = "sdio";
+ pins = "gpio27";
+ drive-strength = <16>;
+ };
+
+ pinmux_sd7 {
+ function = "sdio";
+ pins = "gpio32";
+ drive-strength = <10>;
+ bias-disable;
+ };
+ };
+};
+
+&usb2_hs_phy {
+ status = "okay";
+};
+
+&usb3_hs_phy {
+ status = "okay";
+};
+
+&usb3_ss_phy {
+ status = "okay";
+};
+
+&wifi0 {
+ status = "okay";
+ qcom,ath10k-calibration-variant = "GL-S1300";
+};
+
+&wifi1 {
+ status = "okay";
+ qcom,ath10k-calibration-variant = "GL-S1300";
+};