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authorFelix Fietkau <nbd@openwrt.org>2016-01-15 15:18:18 +0000
committerFelix Fietkau <nbd@openwrt.org>2016-01-15 15:18:18 +0000
commit321823ba05d79198931217df1489d36e27eaeb3c (patch)
tree4ee17dd0af896d2345fc2426719dea10c4742fa5 /target/linux/imx6/patches-4.4/040-ARM-dts-imx-ventana-add-pwm-nodes.patch
parent82c5e2c497c69dca32a59090cddf5f298aa94e01 (diff)
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imx6: add 4.4 support
Build and boot tested on the following hardware: * GW54xx * GW53xx * GW52xx * GW51xx * GW552x * GW551x Signed-off-by: Pushpal Sidhu <psidhu@gateworks.com> SVN-Revision: 48248
Diffstat (limited to 'target/linux/imx6/patches-4.4/040-ARM-dts-imx-ventana-add-pwm-nodes.patch')
-rw-r--r--target/linux/imx6/patches-4.4/040-ARM-dts-imx-ventana-add-pwm-nodes.patch264
1 files changed, 264 insertions, 0 deletions
diff --git a/target/linux/imx6/patches-4.4/040-ARM-dts-imx-ventana-add-pwm-nodes.patch b/target/linux/imx6/patches-4.4/040-ARM-dts-imx-ventana-add-pwm-nodes.patch
new file mode 100644
index 0000000000..759f32e6f6
--- /dev/null
+++ b/target/linux/imx6/patches-4.4/040-ARM-dts-imx-ventana-add-pwm-nodes.patch
@@ -0,0 +1,264 @@
+--- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
+@@ -174,6 +174,24 @@
+ status = "okay";
+ };
+
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
++ status = "disabled";
++};
++
++&pwm3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
++ status = "disabled";
++};
++
++&pwm4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
++ status = "disabled";
++};
++
+ &uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+@@ -294,6 +312,24 @@
+ >;
+ };
+
++ pinctrl_pwm2: pwm2grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm3: pwm3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm4: pwm4grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
++ >;
++ };
++
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
+--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+@@ -282,6 +282,18 @@
+ status = "okay";
+ };
+
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
++ status = "disabled";
++};
++
++&pwm3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
++ status = "disabled";
++};
++
+ &pwm4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm4>;
+@@ -436,6 +448,18 @@
+ >;
+ };
+
++ pinctrl_pwm2: pwm2grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm3: pwm3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
++ >;
++ };
++
+ pinctrl_pwm4: pwm4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
+--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+@@ -287,6 +287,18 @@
+ };
+ };
+
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
++ status = "disabled";
++};
++
++&pwm3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
++ status = "disabled";
++};
++
+ &pwm4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm4>;
+@@ -442,6 +454,18 @@
+ >;
+ };
+
++ pinctrl_pwm2: pwm2grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm3: pwm3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
++ >;
++ };
++
+ pinctrl_pwm4: pwm4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
+--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+@@ -378,6 +378,24 @@
+ };
+ };
+
++&pwm1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
++ status = "disabled";
++};
++
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
++ status = "disabled";
++};
++
++&pwm3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
++ status = "disabled";
++};
++
+ &pwm4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm4>;
+@@ -537,6 +555,24 @@
+ >;
+ };
+
++ pinctrl_pwm1: pwm1grp {
++ fsl,pins = <
++ MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm2: pwm2grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm3: pwm3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
++ >;
++ };
++
+ pinctrl_pwm4: pwm4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
+--- a/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
+@@ -198,6 +198,18 @@
+ status = "okay";
+ };
+
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
++ status = "disabled";
++};
++
++&pwm3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
++ status = "disabled";
++};
++
+ &ssi1 {
+ status = "okay";
+ };
+@@ -290,6 +302,18 @@
+ >;
+ };
+
++ pinctrl_pwm2: pwm2grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm3: pwm3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
++ >;
++ };
++
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
+--- a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
+@@ -164,6 +164,18 @@
+ status = "okay";
+ };
+
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
++ status = "disabled";
++};
++
++&pwm3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
++ status = "disabled";
++};
++
+ &uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+@@ -242,6 +254,18 @@
+ >;
+ };
+
++ pinctrl_pwm2: pwm2grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm3: pwm3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
++ >;
++ };
++
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1