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authorLuka Perkov <luka@openwrt.org>2016-01-18 06:43:48 +0000
committerLuka Perkov <luka@openwrt.org>2016-01-18 06:43:48 +0000
commitc4de2dfd2d79021626acdbaefc6cc9c17eac35bf (patch)
tree7c66af2dac9f181d8e9c431ab9f73066de075f24 /target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch
parent85bdde7cf2821655c74fb4381926335a1161f0c1 (diff)
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imx6: drop 4.3 support
Signed-off-by: Luka Perkov <luka@openwrt.org> SVN-Revision: 48299
Diffstat (limited to 'target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch')
-rw-r--r--target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch70
1 files changed, 0 insertions, 70 deletions
diff --git a/target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch b/target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch
deleted file mode 100644
index c861e3848c..0000000000
--- a/target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From d86b202436b6f3111c4c37b8701daa0764d2ca55 Mon Sep 17 00:00:00 2001
-From: Tim Harvey <tharvey@gateworks.com>
-Date: Thu, 5 Nov 2015 11:10:00 -0800
-Subject: [PATCH 3/3] ARM: dts: imx: ventana: Allow HDMI and LVDS to work
- simultaneously
-
-Currently it is not possible to have HDMI and LVDS working simultaneously,
-because both ports try to use PLL5.
-
-Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be
-driven from independent sources.
-
-With this change the LDB pixel clock goes to 68.57 MHz, which is still
-within the valid range for the displays supported by the Ventana boards.
-
-Signed-off-by: Tim Harvey <tharvey@gateworks.com>
----
- arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 7 +++++++
- arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 7 +++++++
- arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 7 +++++++
- 3 files changed, 21 insertions(+)
-
---- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
-+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
-@@ -151,6 +151,13 @@
- status = "okay";
- };
-
-+&clks {
-+ assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
-+ <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
-+ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
-+ <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
-+};
-+
- &fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet>;
---- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
-+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
-@@ -152,6 +152,13 @@
- status = "okay";
- };
-
-+&clks {
-+ assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
-+ <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
-+ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
-+ <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
-+};
-+
- &fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet>;
---- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
-+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
-@@ -142,6 +142,13 @@
- status = "okay";
- };
-
-+&clks {
-+ assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
-+ <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
-+ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
-+ <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
-+};
-+
- &fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet>;