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authorLuka Perkov <luka@openwrt.org>2015-04-11 10:28:00 +0000
committerLuka Perkov <luka@openwrt.org>2015-04-11 10:28:00 +0000
commitd21b92af8e17eaf1666baaf14e4d202c6381425d (patch)
tree16b6d5c1c334018d6dc194e7af00e73fdf38223a /target/linux/imx6/patches-3.14/208-ventana-plx-allow-override-gpio-output-mask.patch
parent912a6371f8a929cf3d96b32a8d5c3eac2eadac28 (diff)
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imx6: drop 3.14
Signed-off-by: Luka Perkov <luka@openwrt.org> SVN-Revision: 45371
Diffstat (limited to 'target/linux/imx6/patches-3.14/208-ventana-plx-allow-override-gpio-output-mask.patch')
-rw-r--r--target/linux/imx6/patches-3.14/208-ventana-plx-allow-override-gpio-output-mask.patch58
1 files changed, 0 insertions, 58 deletions
diff --git a/target/linux/imx6/patches-3.14/208-ventana-plx-allow-override-gpio-output-mask.patch b/target/linux/imx6/patches-3.14/208-ventana-plx-allow-override-gpio-output-mask.patch
deleted file mode 100644
index 97298fd694..0000000000
--- a/target/linux/imx6/patches-3.14/208-ventana-plx-allow-override-gpio-output-mask.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-This patch allows passing in the gpio output mask used for GPIO0-7 on the
-PLX PCIe bridge. These GPIO's are used for PERST# on the downstream ports.
-
-Allowing the kernel to override the default configuration allows for keeping
-specific devices held in reset. One important use of this is to allow
-temporarily disabling devices that may request too many resources such as
-an unprogrammed i210 device.
-
---- a/arch/arm/mach-imx/mach-imx6q.c
-+++ b/arch/arm/mach-imx/mach-imx6q.c
-@@ -84,6 +84,7 @@ static int ksz9031rn_phy_fixup(struct ph
- * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
- * as they are used for slots1-7 PERST#
- */
-+unsigned int ventana_plx_gpio = 0xfe;
- static void ventana_pciesw_early_fixup(struct pci_dev *dev)
- {
- u32 dw;
-@@ -95,19 +96,25 @@ static void ventana_pciesw_early_fixup(s
- return;
-
- pci_read_config_dword(dev, 0x62c, &dw);
-+ dev_info(&dev->dev, "de-asserting downstream PERST# 0x%04x\n",
-+ ventana_plx_gpio);
- dw |= 0xaaa8; // GPIO1-7 outputs
- pci_write_config_dword(dev, 0x62c, dw);
--
-- pci_read_config_dword(dev, 0x644, &dw);
-- dw |= 0xfe; // GPIO1-7 output high
-- pci_write_config_dword(dev, 0x644, dw);
--
-+ pci_write_config_dword(dev, 0x644, ventana_plx_gpio);
- msleep(100);
- }
- DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, ventana_pciesw_early_fixup);
- DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, ventana_pciesw_early_fixup);
- DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, ventana_pciesw_early_fixup);
-
-+static int __init setup_ventana_plx_gpio(char *str)
-+{
-+ get_option(&str, &ventana_plx_gpio);
-+
-+ return 0;
-+}
-+early_param("plx_gpio", setup_ventana_plx_gpio);
-+
- static int ar8031_phy_fixup(struct phy_device *dev)
- {
- u16 val;
-@@ -328,7 +335,7 @@ static void __init imx6q_init_irq(void)
- irqchip_init();
- }
-
--static const char *imx6q_dt_compat[] __initconst = {
-+static const char *imx6q_dt_compat[] __initdata = {
- "fsl,imx6dl",
- "fsl,imx6q",
- NULL,