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author | Luka Perkov <luka@openwrt.org> | 2014-08-11 20:35:06 +0000 |
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committer | Luka Perkov <luka@openwrt.org> | 2014-08-11 20:35:06 +0000 |
commit | 9d826428b7c8a8f8167f71f3995bacc5a61efc22 (patch) | |
tree | 293b46395aa4973c93c3f96e94bb4ee81848a283 /target/linux/imx6/patches-3.14/200-pci_designware_add-ability-for-custom-swizzle.patch | |
parent | e47c4d7014d26c33aaa7522f06b4db4581d54703 (diff) | |
download | upstream-9d826428b7c8a8f8167f71f3995bacc5a61efc22.tar.gz upstream-9d826428b7c8a8f8167f71f3995bacc5a61efc22.tar.bz2 upstream-9d826428b7c8a8f8167f71f3995bacc5a61efc22.zip |
imx6: kernel: add GW16082 miniPCI Expansion Mezzanine support
The GW16082 miniPCI Expansion Mezzanine has the INTA/B/C/D IRQ's reversed
from the PCI standard. This will soon be resolved in the bootloader via
devicetree, but in the meantime this will work around the issue.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
SVN-Revision: 42146
Diffstat (limited to 'target/linux/imx6/patches-3.14/200-pci_designware_add-ability-for-custom-swizzle.patch')
-rw-r--r-- | target/linux/imx6/patches-3.14/200-pci_designware_add-ability-for-custom-swizzle.patch | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/target/linux/imx6/patches-3.14/200-pci_designware_add-ability-for-custom-swizzle.patch b/target/linux/imx6/patches-3.14/200-pci_designware_add-ability-for-custom-swizzle.patch new file mode 100644 index 0000000000..b174376860 --- /dev/null +++ b/target/linux/imx6/patches-3.14/200-pci_designware_add-ability-for-custom-swizzle.patch @@ -0,0 +1,33 @@ +commit e84634dc6c7f3f6af9b8ef1fb36f0d85c476ab95 +Author: Tim Harvey <tharvey@gateworks.com> +Date: Thu Feb 27 01:02:23 2014 -0800 + + PCI: designware: add ability for custom swizzle + + Add the ability for a platform driver to provide a platform-specific + swizzle function. + + Signed-off-by: Tim Harvey <tharvey@gateworks.com> + +--- a/drivers/pci/host/pcie-designware.c ++++ b/drivers/pci/host/pcie-designware.c +@@ -481,6 +481,9 @@ int __init dw_pcie_host_init(struct pcie + if (pp->ops->host_init) + pp->ops->host_init(pp); + ++ if (pp->swizzle) ++ dw_pci.swizzle = pp->swizzle; ++ + dw_pcie_wr_own_conf(pp, PCI_BASE_ADDRESS_0, 4, 0); + + /* program correct class for RC */ +--- a/drivers/pci/host/pcie-designware.h ++++ b/drivers/pci/host/pcie-designware.h +@@ -53,6 +53,7 @@ struct pcie_port { + struct irq_domain *irq_domain; + unsigned long msi_data; + DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS); ++ u8 (*swizzle)(struct pci_dev *, u8 *); + }; + + struct pcie_host_ops { |