imx6: add initial 3.13 support

Signed-off-by: Luka Perkov <luka@openwrt.org>

SVN-Revision: 39573

9 files changed, 2682 insertions, 0 deletions

diff --git a/target/linux/imx6/patches-3.13/0001-ARM-dts-disable-flexcan-by-default.patch b/target/linux/imx6/patches-3.13/0001-ARM-dts-disable-flexcan-by-default.patch
new file mode 100644
index 0000000000..babd544af8
--- /dev/null
+++ b/target/linux/imx6/patches-3.13/0001-ARM-dts-disable-flexcan-by-default.patch
@@ -0,0 +1,31 @@
+From 1759b172f78263de7077a2743e11f3b718682849 Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey@gateworks.com>
+Date: Tue, 22 Oct 2013 21:51:27 -0700
+Subject: [PATCH 1/3] ARM: dts: disable flexcan by default
+
+Typically nodes are disabled by default and enabled when needed.
+
+Signed-off-by: Tim Harvey <tharvey@gateworks.com>
+Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
+---
+ arch/arm/boot/dts/imx6qdl.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm/boot/dts/imx6qdl.dtsi
++++ b/arch/arm/boot/dts/imx6qdl.dtsi
+@@ -331,6 +331,7 @@
+ 				interrupts = <0 110 0x04>;
+ 				clocks = <&clks 108>, <&clks 109>;
+ 				clock-names = "ipg", "per";
++				status = "disabled";
+ 			};
+ 
+ 			can2: flexcan@02094000 {
+@@ -339,6 +340,7 @@
+ 				interrupts = <0 111 0x04>;
+ 				clocks = <&clks 110>, <&clks 111>;
+ 				clock-names = "ipg", "per";
++				status = "disabled";
+ 			};
+ 
+ 			gpt: gpt@02098000 {
diff --git a/target/linux/imx6/patches-3.13/0002-ARM-dts-added-several-new-imx-pinmux-groups.patch b/target/linux/imx6/patches-3.13/0002-ARM-dts-added-several-new-imx-pinmux-groups.patch
new file mode 100644
index 0000000000..f2d7f6ca17
--- /dev/null
+++ b/target/linux/imx6/patches-3.13/0002-ARM-dts-added-several-new-imx-pinmux-groups.patch
@@ -0,0 +1,115 @@
+From 925467009cc6d92edb02b9e68710db022cd56f41 Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey@gateworks.com>
+Date: Tue, 22 Oct 2013 21:51:25 -0700
+Subject: [PATCH 2/3] ARM: dts: added several new imx-pinmux groups
+
+Signed-off-by: Tim Harvey <tharvey@gateworks.com>
+Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
+---
+ arch/arm/boot/dts/imx6qdl.dtsi | 60 ++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 60 insertions(+)
+
+--- a/arch/arm/boot/dts/imx6qdl.dtsi
++++ b/arch/arm/boot/dts/imx6qdl.dtsi
+@@ -639,6 +639,14 @@
+ 							MX6QDL_PAD_DISP0_DAT19__AUD5_RXD  0x80000000
+ 						>;
+ 					};
++
++					pinctrl_audmux_4: audmux-4 {
++						fsl,pins = <
++							MX6QDL_PAD_EIM_D24__AUD5_RXFS     0x80000000
++							MX6QDL_PAD_EIM_D25__AUD5_RXC      0x80000000
++							MX6QDL_PAD_DISP0_DAT19__AUD5_RXD  0x80000000
++						>;
++					};
+ 				};
+ 
+ 				ecspi1 {
+@@ -811,6 +819,28 @@
+ 							MX6QDL_PAD_SD4_DAT0__NAND_DQS      0x00b1
+ 						>;
+ 					};
++
++					/* No Strobe */
++					pinctrl_gpmi_nand_2: gpmi-nand-2 {
++						fsl,pins = <
++							MX6QDL_PAD_NANDF_CLE__NAND_CLE     0xb0b1
++							MX6QDL_PAD_NANDF_ALE__NAND_ALE     0xb0b1
++							MX6QDL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1
++							MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
++							MX6QDL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1
++							MX6QDL_PAD_NANDF_CS1__NAND_CE1_B   0xb0b1
++							MX6QDL_PAD_SD4_CMD__NAND_RE_B      0xb0b1
++							MX6QDL_PAD_SD4_CLK__NAND_WE_B      0xb0b1
++							MX6QDL_PAD_NANDF_D0__NAND_DATA00   0xb0b1
++							MX6QDL_PAD_NANDF_D1__NAND_DATA01   0xb0b1
++							MX6QDL_PAD_NANDF_D2__NAND_DATA02   0xb0b1
++							MX6QDL_PAD_NANDF_D3__NAND_DATA03   0xb0b1
++							MX6QDL_PAD_NANDF_D4__NAND_DATA04   0xb0b1
++							MX6QDL_PAD_NANDF_D5__NAND_DATA05   0xb0b1
++							MX6QDL_PAD_NANDF_D6__NAND_DATA06   0xb0b1
++							MX6QDL_PAD_NANDF_D7__NAND_DATA07   0xb0b1
++						>;
++					};
+ 				};
+ 
+ 				hdmi_hdcp {
+@@ -1058,6 +1088,13 @@
+ 							MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
+ 						>;
+ 					};
++
++					pinctrl_uart1_2: uart1grp-2 {
++						fsl,pins = <
++							MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
++							MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
++						>;
++					};
+ 				};
+ 
+ 				uart2 {
+@@ -1076,6 +1113,13 @@
+ 							MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
+ 						>;
+ 					};
++
++					pinctrl_uart2_3: uart2grp-3 {
++						fsl,pins = <
++							MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
++							MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
++						>;
++					};
+ 				};
+ 
+ 				uart3 {
+@@ -1096,6 +1140,13 @@
+ 							MX6QDL_PAD_EIM_EB3__UART3_RTS_B	  0x1b0b1
+ 						>;
+ 					};
++
++					pinctrl_uart3_3: uart3grp-3 {
++						fsl,pins = <
++							MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
++							MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
++						>;
++					};
+ 				};
+ 
+ 				uart4 {
+@@ -1106,6 +1157,15 @@
+ 						>;
+ 					};
+ 				};
++
++				uart5 {
++					pinctrl_uart5_1: uart5grp-1 {
++						fsl,pins = <
++							MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
++							MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
++						>;
++					};
++				};
+ 
+ 				usbotg {
+ 					pinctrl_usbotg_1: usbotggrp-1 {
diff --git a/target/linux/imx6/patches-3.13/0003-ARM-dts-add-Gateworks-Ventana-support.patch b/target/linux/imx6/patches-3.13/0003-ARM-dts-add-Gateworks-Ventana-support.patch
new file mode 100644
index 0000000000..33904b4a58
--- /dev/null
+++ b/target/linux/imx6/patches-3.13/0003-ARM-dts-add-Gateworks-Ventana-support.patch
@@ -0,0 +1,2240 @@
+From bf2ef777f8ed0830be49b62167cc67d3be6abba6 Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey@gateworks.com>
+Date: Tue, 22 Oct 2013 21:51:26 -0700
+Subject: [PATCH 3/3] ARM: dts: add Gateworks Ventana support
+
+The Gateworks Ventana product family consists of several baseboard designs
+based on the Freescale i.MX6 family of processors.  Each baseboard has a
+different set of possible features.
+
+Signed-off-by: Tim Harvey <tharvey@gateworks.com>
+Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
+---
+ arch/arm/boot/dts/Makefile            |   9 +
+ arch/arm/boot/dts/imx6dl-gw51xx.dts   |  19 ++
+ arch/arm/boot/dts/imx6dl-gw52xx.dts   |  19 ++
+ arch/arm/boot/dts/imx6dl-gw53xx.dts   |  19 ++
+ arch/arm/boot/dts/imx6dl-gw54xx.dts   |  19 ++
+ arch/arm/boot/dts/imx6q-gw51xx.dts    |  19 ++
+ arch/arm/boot/dts/imx6q-gw52xx.dts    |  23 ++
+ arch/arm/boot/dts/imx6q-gw53xx.dts    |  23 ++
+ arch/arm/boot/dts/imx6q-gw5400-a.dts  | 443 ++++++++++++++++++++++++++++++++
+ arch/arm/boot/dts/imx6q-gw54xx.dts    |  23 ++
+ arch/arm/boot/dts/imx6qdl-gw51xx.dtsi | 272 ++++++++++++++++++++
+ arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 373 +++++++++++++++++++++++++++
+ arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 429 +++++++++++++++++++++++++++++++
+ arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 457 ++++++++++++++++++++++++++++++++++
+ 14 files changed, 2147 insertions(+)
+ create mode 100644 arch/arm/boot/dts/imx6dl-gw51xx.dts
+ create mode 100644 arch/arm/boot/dts/imx6dl-gw52xx.dts
+ create mode 100644 arch/arm/boot/dts/imx6dl-gw53xx.dts
+ create mode 100644 arch/arm/boot/dts/imx6dl-gw54xx.dts
+ create mode 100644 arch/arm/boot/dts/imx6q-gw51xx.dts
+ create mode 100644 arch/arm/boot/dts/imx6q-gw52xx.dts
+ create mode 100644 arch/arm/boot/dts/imx6q-gw53xx.dts
+ create mode 100644 arch/arm/boot/dts/imx6q-gw5400-a.dts
+ create mode 100644 arch/arm/boot/dts/imx6q-gw54xx.dts
+ create mode 100644 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
+ create mode 100644 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+ create mode 100644 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+ create mode 100644 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -136,10 +136,19 @@ dtb-$(CONFIG_ARCH_MXC) += \
+ 	imx53-mba53.dtb \
+ 	imx53-qsb.dtb \
+ 	imx53-smd.dtb \
++	imx6dl-gw51xx.dtb \
++	imx6dl-gw52xx.dtb \
++	imx6dl-gw53xx.dtb \
++	imx6dl-gw54xx.dtb \
+ 	imx6dl-sabreauto.dtb \
+ 	imx6dl-sabresd.dtb \
+ 	imx6dl-wandboard.dtb \
+ 	imx6q-arm2.dtb \
++	imx6q-gw51xx.dtb \
++	imx6q-gw52xx.dtb \
++	imx6q-gw53xx.dtb \
++	imx6q-gw5400-a.dtb \
++	imx6q-gw54xx.dtb \
+ 	imx6q-phytec-pbab01.dtb \
+ 	imx6q-sabreauto.dtb \
+ 	imx6q-sabrelite.dtb \
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6dl-gw51xx.dts
+@@ -0,0 +1,19 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-gw51xx.dtsi"
++
++/ {
++	model = "Gateworks Ventana i.MX6 DualLite GW51XX";
++	compatible = "gw,imx6dl-gw51xx", "gw,ventana", "fsl,imx6dl";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6dl-gw52xx.dts
+@@ -0,0 +1,19 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-gw52xx.dtsi"
++
++/ {
++	model = "Gateworks Ventana i.MX6 DualLite GW52XX";
++	compatible = "gw,imx6dl-gw52xx", "gw,ventana", "fsl,imx6dl";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6dl-gw53xx.dts
+@@ -0,0 +1,19 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-gw53xx.dtsi"
++
++/ {
++	model = "Gateworks Ventana i.MX6 DualLite GW53XX";
++	compatible = "gw,imx6dl-gw53xx", "gw,ventana", "fsl,imx6dl";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6dl-gw54xx.dts
+@@ -0,0 +1,19 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-gw54xx.dtsi"
++
++/ {
++	model = "Gateworks Ventana i.MX6 DualLite GW54XX";
++	compatible = "gw,imx6dl-gw54xx", "gw,ventana", "fsl,imx6dl";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-gw51xx.dts
+@@ -0,0 +1,19 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6q.dtsi"
++#include "imx6qdl-gw54xx.dtsi"
++
++/ {
++	model = "Gateworks Ventana i.MX6 Quad GW51XX";
++	compatible = "gw,imx6q-gw51xx", "gw,ventana", "fsl,imx6q";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-gw52xx.dts
+@@ -0,0 +1,23 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6q.dtsi"
++#include "imx6qdl-gw52xx.dtsi"
++
++/ {
++	model = "Gateworks Ventana i.MX6 Quad GW52XX";
++	compatible = "gw,imx6q-gw52xx", "gw,ventana", "fsl,imx6q";
++};
++
++&sata {
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-gw53xx.dts
+@@ -0,0 +1,23 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6q.dtsi"
++#include "imx6qdl-gw53xx.dtsi"
++
++/ {
++	model = "Gateworks Ventana i.MX6 Quad GW53XX";
++	compatible = "gw,imx6q-gw53xx", "gw,ventana", "fsl,imx6q";
++};
++
++&sata {
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts
+@@ -0,0 +1,443 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6q.dtsi"
++
++/ {
++	model = "Gateworks Ventana GW5400-A";
++	compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
++
++	/* these are used by bootloader for disabling nodes */
++	aliases {
++		ethernet0 = &fec;
++		ethernet1 = &eth1;
++		i2c0 = &i2c1;
++		i2c1 = &i2c2;
++		i2c2 = &i2c3;
++		led0 = &led0;
++		led1 = &led1;
++		led2 = &led2;
++		sky2 = &eth1;
++		ssi0 = &ssi1;
++		spi0 = &ecspi1;
++		usb0 = &usbh1;
++		usb1 = &usbotg;
++		usdhc2 = &usdhc3;
++	};
++
++	chosen {
++		bootargs = "console=ttymxc1,115200";
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		led0: user1 {
++			label = "user1";
++			gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
++			default-state = "on";
++			linux,default-trigger = "heartbeat";
++		};
++
++		led1: user2 {
++			label = "user2";
++			gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR */
++			default-state = "off";
++		};
++
++		led2: user3 {
++			label = "user3";
++			gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
++			default-state = "off";
++		};
++	};
++
++	memory {
++		reg = <0x10000000 0x40000000>;
++	};
++
++	pps {
++		compatible = "pps-gpio";
++		gpios = <&gpio1 5 0>;
++		status = "okay";
++	};
++
++	regulators {
++		compatible = "simple-bus";
++
++		reg_1p0v: 1p0v {
++			compatible = "regulator-fixed";
++			regulator-name = "1P0V";
++			regulator-min-microvolt = <1000000>;
++			regulator-max-microvolt = <1000000>;
++			regulator-always-on;
++		};
++
++		reg_3p3v: 3p3v {
++			compatible = "regulator-fixed";
++			regulator-name = "3P3V";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++			regulator-always-on;
++		};
++
++		reg_usb_h1_vbus: usb_h1_vbus {
++			compatible = "regulator-fixed";
++			regulator-name = "usb_h1_vbus";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			regulator-always-on;
++		};
++
++		reg_usb_otg_vbus: usb_otg_vbus {
++			compatible = "regulator-fixed";
++			regulator-name = "usb_otg_vbus";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			gpio = <&gpio3 22 0>;
++			enable-active-high;
++		};
++	};
++
++	sound {
++		compatible = "fsl,imx6q-sabrelite-sgtl5000",
++			     "fsl,imx-audio-sgtl5000";
++		model = "imx6q-sabrelite-sgtl5000";
++		ssi-controller = <&ssi1>;
++		audio-codec = <&codec>;
++		audio-routing =
++			"MIC_IN", "Mic Jack",
++			"Mic Jack", "Mic Bias",
++			"Headphone Jack", "HP_OUT";
++		mux-int-port = <1>;
++		mux-ext-port = <4>;
++	};
++};
++
++&audmux {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_audmux_1>;
++	status = "okay";
++};
++
++&ecspi1 {
++	fsl,spi-num-chipselects = <1>;
++	cs-gpios = <&gpio3 19 0>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_ecspi1_1>;
++	status = "okay";
++
++	flash: m25p80@0 {
++		compatible = "sst,w25q256";
++		spi-max-frequency = <30000000>;
++		reg = <0>;
++	};
++};
++
++&fec {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_enet_1>;
++	phy-mode = "rgmii";
++	phy-reset-gpios = <&gpio1 30 0>;
++	status = "okay";
++};
++
++&i2c1 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c1_1>;
++	status = "okay";
++
++	eeprom1: eeprom@50 {
++		compatible = "atmel,24c02";
++		reg = <0x50>;
++		pagesize = <16>;
++	};
++
++	eeprom2: eeprom@51 {
++		compatible = "atmel,24c02";
++		reg = <0x51>;
++		pagesize = <16>;
++	};
++
++	eeprom3: eeprom@52 {
++		compatible = "atmel,24c02";
++		reg = <0x52>;
++		pagesize = <16>;
++	};
++
++	eeprom4: eeprom@53 {
++		compatible = "atmel,24c02";
++		reg = <0x53>;
++		pagesize = <16>;
++	};
++
++	gpio: pca9555@23 {
++		compatible = "nxp,pca9555";
++		reg = <0x23>;
++		gpio-controller;
++		#gpio-cells = <2>;
++	};
++
++	hwmon: gsc@29 {
++		compatible = "gw,gsp";
++		reg = <0x29>;
++	};
++
++	rtc: ds1672@68 {
++		compatible = "dallas,ds1672";
++		reg = <0x68>;
++	};
++};
++
++&i2c2 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c2_2>;
++	status = "okay";
++
++	pmic: pfuze100@08 {
++		compatible = "fsl,pfuze100";
++		reg = <0x08>;
++
++		regulators {
++			sw1a_reg: sw1ab {
++				regulator-min-microvolt = <300000>;
++				regulator-max-microvolt = <1875000>;
++				regulator-boot-on;
++				regulator-always-on;
++				regulator-ramp-delay = <6250>;
++			};
++
++			sw1c_reg: sw1c {
++				regulator-min-microvolt = <300000>;
++				regulator-max-microvolt = <1875000>;
++				regulator-boot-on;
++				regulator-always-on;
++				regulator-ramp-delay = <6250>;
++			};
++
++			sw2_reg: sw2 {
++				regulator-min-microvolt = <800000>;
++				regulator-max-microvolt = <3950000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			sw3a_reg: sw3a {
++				regulator-min-microvolt = <400000>;
++				regulator-max-microvolt = <1975000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			sw3b_reg: sw3b {
++				regulator-min-microvolt = <400000>;
++				regulator-max-microvolt = <1975000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			sw4_reg: sw4 {
++				regulator-min-microvolt = <800000>;
++				regulator-max-microvolt = <3300000>;
++			};
++
++			swbst_reg: swbst {
++				regulator-min-microvolt = <5000000>;
++				regulator-max-microvolt = <5150000>;
++			};
++
++			snvs_reg: vsnvs {
++				regulator-min-microvolt = <1000000>;
++				regulator-max-microvolt = <3000000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			vref_reg: vrefddr {
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			vgen1_reg: vgen1 {
++				regulator-min-microvolt = <800000>;
++				regulator-max-microvolt = <1550000>;
++			};
++
++			vgen2_reg: vgen2 {
++				regulator-min-microvolt = <800000>;
++				regulator-max-microvolt = <1550000>;
++			};
++
++			vgen3_reg: vgen3 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++			};
++
++			vgen4_reg: vgen4 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-always-on;
++			};
++
++			vgen5_reg: vgen5 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-always-on;
++			};
++
++			vgen6_reg: vgen6 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-always-on;
++			};
++		};
++	};
++
++	pciswitch: pex8609@3f {
++		compatible = "plx,pex8609";
++		reg = <0x3f>;
++	};
++
++	pciclkgen: si52147@6b {
++		compatible = "sil,si52147";
++		reg = <0x6b>;
++	};
++};
++
++&i2c3 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c3_2>;
++	status = "okay";
++
++	accelerometer: mma8450@1c {
++		compatible = "fsl,mma8450";
++		reg = <0x1c>;
++	};
++
++	codec: sgtl5000@0a {
++		compatible = "fsl,sgtl5000";
++		reg = <0x0a>;
++		clocks = <&clks 201>;
++		VDDA-supply = <&sw4_reg>;
++		VDDIO-supply = <&reg_3p3v>;
++	};
++
++	hdmiin: adv7611@4c {
++		compatible = "adi,adv7611";
++		reg = <0x4c>;
++	};
++
++	touchscreen: egalax_ts@04 {
++		compatible = "eeti,egalax_ts";
++		reg = <0x04>;
++		interrupt-parent = <&gpio7>;
++		interrupts = <12 2>; /* gpio7_12 active low */
++		wakeup-gpios = <&gpio7 12 0>;
++	};
++
++	videoout: adv7393@2a {
++		compatible = "adi,adv7393";
++		reg = <0x2a>;
++	};
++
++	videoin: adv7180@20 {
++		compatible = "adi,adv7180";
++		reg = <0x20>;
++	};
++};
++
++&iomuxc {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_hog>;
++
++	hog {
++		pinctrl_hog: hoggrp {
++			fsl,pins = <
++				MX6QDL_PAD_EIM_D22__GPIO3_IO22    0x80000000 /* OTG_PWR_EN */
++				MX6QDL_PAD_EIM_D19__GPIO3_IO19    0x80000000 /* SPINOR_CS0# */
++				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
++				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29  0x80000000 /* PCIE RST */
++				MX6QDL_PAD_GPIO_0__CCM_CLKO1      0x000130b0 /* AUD4_MCK */
++				MX6QDL_PAD_GPIO_5__GPIO1_IO05     0x80000000 /* GPS_PPS */
++				MX6QDL_PAD_GPIO_17__GPIO7_IO12    0x80000000 /* TOUCH_IRQ# */
++				MX6QDL_PAD_KEY_COL0__GPIO4_IO06   0x80000000 /* user1 led */
++				MX6QDL_PAD_KEY_COL2__GPIO4_IO10   0x80000000 /* user2 led */
++				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15   0x80000000 /* user3 led */
++				MX6QDL_PAD_SD1_DAT0__GPIO1_IO16   0x80000000 /* USBHUB_RST# */
++				MX6QDL_PAD_SD1_DAT3__GPIO1_IO21   0x80000000 /* MIPI_DIO */
++			 >;
++		};
++	};
++};
++
++&ldb {
++	status = "okay";
++	lvds-channel@0 {
++		crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>;
++	};
++};
++
++&pcie {
++	reset-gpio = <&gpio1 29 0>;
++	status = "okay";
++
++	eth1: sky2@8 { /* MAC/PHY on bus 8 */
++		compatible = "marvell,sky2";
++	};
++};
++
++&ssi1 {
++	fsl,mode = "i2s-slave";
++	status = "okay";
++};
++
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart1_2>;
++	status = "okay";
++};
++
++&uart2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart2_3>;
++	status = "okay";
++};
++
++&uart5 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart5_1>;
++	status = "okay";
++};
++
++&usbotg {
++	vbus-supply = <&reg_usb_otg_vbus>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usbotg_1>;
++	disable-over-current;
++	status = "okay";
++};
++
++&usbh1 {
++	vbus-supply = <&reg_usb_h1_vbus>;
++	status = "okay";
++};
++
++&usdhc3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usdhc3_2>;
++	cd-gpios = <&gpio7 0 0>;
++	vmmc-supply = <&reg_3p3v>;
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-gw54xx.dts
+@@ -0,0 +1,23 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6q.dtsi"
++#include "imx6qdl-gw54xx.dtsi"
++
++/ {
++	model = "Gateworks Ventana i.MX6 Quad GW54XX";
++	compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q";
++};
++
++&sata {
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
+@@ -0,0 +1,272 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/ {
++	/* these are used by bootloader for disabling nodes */
++	aliases {
++		can0 = &can1;
++		ethernet0 = &fec;
++		led0 = &led0;
++		led1 = &led1;
++		nand = &gpmi;
++		usb0 = &usbh1;
++		usb1 = &usbotg;
++	};
++
++	chosen {
++		bootargs = "console=ttymxc1,115200";
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		led0: user1 {
++			label = "user1";
++			gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
++			default-state = "on";
++			linux,default-trigger = "heartbeat";
++		};
++
++		led1: user2 {
++			label = "user2";
++			gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
++			default-state = "off";
++		};
++	};
++
++	memory {
++		reg = <0x10000000 0x20000000>;
++	};
++
++	pps {
++		compatible = "pps-gpio";
++		gpios = <&gpio1 26 0>;
++		status = "okay";
++	};
++
++	regulators {
++		compatible = "simple-bus";
++
++		reg_3p3v: 3p3v {
++			compatible = "regulator-fixed";
++			regulator-name = "3P3V";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++			regulator-always-on;
++		};
++
++		reg_5p0v: 5p0v {
++			compatible = "regulator-fixed";
++			regulator-name = "5P0V";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			regulator-always-on;
++		};
++
++		reg_usb_otg_vbus: usb_otg_vbus {
++			compatible = "regulator-fixed";
++			regulator-name = "usb_otg_vbus";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			gpio = <&gpio3 22 0>;
++			enable-active-high;
++		};
++	};
++};
++
++&fec {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_enet_1>;
++	phy-mode = "rgmii";
++	phy-reset-gpios = <&gpio1 30 0>;
++	status = "okay";
++};
++
++&gpmi {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_gpmi_nand_2>;
++	status = "okay";
++};
++
++&i2c1 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c1_1>;
++	status = "okay";
++
++	eeprom1: eeprom@50 {
++		compatible = "atmel,24c02";
++		reg = <0x50>;
++		pagesize = <16>;
++	};
++
++	eeprom2: eeprom@51 {
++		compatible = "atmel,24c02";
++		reg = <0x51>;
++		pagesize = <16>;
++	};
++
++	eeprom3: eeprom@52 {
++		compatible = "atmel,24c02";
++		reg = <0x52>;
++		pagesize = <16>;
++	};
++
++	eeprom4: eeprom@53 {
++		compatible = "atmel,24c02";
++		reg = <0x53>;
++		pagesize = <16>;
++	};
++
++	gpio: pca9555@23 {
++		compatible = "nxp,pca9555";
++		reg = <0x23>;
++		gpio-controller;
++		#gpio-cells = <2>;
++	};
++
++	hwmon: gsc@29 {
++		compatible = "gw,gsp";
++		reg = <0x29>;
++	};
++
++	rtc: ds1672@68 {
++		compatible = "dallas,ds1672";
++		reg = <0x68>;
++	};
++};
++
++&i2c2 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c2_2>;
++	status = "okay";
++
++	pmic: ltc3676@3c {
++		compatible = "ltc,ltc3676";
++		reg = <0x3c>;
++
++		regulators {
++			sw1_reg: ltc3676__sw1 {
++				regulator-min-microvolt = <1175000>;
++				regulator-max-microvolt = <1175000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			sw2_reg: ltc3676__sw2 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			sw3_reg: ltc3676__sw3 {
++				regulator-min-microvolt = <1175000>;
++				regulator-max-microvolt = <1175000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			sw4_reg: ltc3676__sw4 {
++				regulator-min-microvolt = <1500000>;
++				regulator-max-microvolt = <1500000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			ldo2_reg: ltc3676__ldo2 {
++				regulator-min-microvolt = <2500000>;
++				regulator-max-microvolt = <2500000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			ldo4_reg: ltc3676__ldo4 {
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++			};
++		};
++	};
++};
++
++&i2c3 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c3_2>;
++	status = "okay";
++
++	videoin: adv7180@20 {
++		compatible = "adi,adv7180";
++		reg = <0x20>;
++	};
++};
++
++&iomuxc {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_hog>;
++
++	hog {
++		pinctrl_hog: hoggrp {
++			fsl,pins = <
++				MX6QDL_PAD_EIM_A19__GPIO2_IO19   0x80000000 /* MEZZ_DIO0 */
++				MX6QDL_PAD_EIM_A20__GPIO2_IO18   0x80000000 /* MEZZ_DIO1 */
++				MX6QDL_PAD_EIM_D22__GPIO3_IO22   0x80000000 /* OTG_PWR_EN */
++				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
++				MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
++				MX6QDL_PAD_GPIO_0__GPIO1_IO00    0x80000000 /* PCIE_RST# */
++				MX6QDL_PAD_KEY_COL0__GPIO4_IO06  0x80000000 /* user1 led */
++				MX6QDL_PAD_KEY_ROW0__GPIO4_IO07  0x80000000 /* user2 led */
++			 >;
++		};
++	};
++};
++
++&pcie {
++	reset-gpio = <&gpio1 0 0>;
++	status = "okay";
++};
++
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart1_2>;
++	status = "okay";
++};
++
++&uart2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart2_3>;
++	status = "okay";
++};
++
++&uart3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart3_3>;
++	status = "okay";
++};
++
++&uart5 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart5_1>;
++	status = "okay";
++};
++
++&usbotg {
++	vbus-supply = <&reg_usb_otg_vbus>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usbotg_1>;
++	disable-over-current;
++	status = "okay";
++};
++
++&usbh1 {
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+@@ -0,0 +1,373 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/ {
++	/* these are used by bootloader for disabling nodes */
++	aliases {
++		ethernet0 = &fec;
++		led0 = &led0;
++		led1 = &led1;
++		led2 = &led2;
++		nand = &gpmi;
++		ssi0 = &ssi1;
++		usb0 = &usbh1;
++		usb1 = &usbotg;
++		usdhc2 = &usdhc3;
++	};
++
++	chosen {
++		bootargs = "console=ttymxc1,115200";
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		led0: user1 {
++			label = "user1";
++			gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
++			default-state = "on";
++			linux,default-trigger = "heartbeat";
++		};
++
++		led1: user2 {
++			label = "user2";
++			gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
++			default-state = "off";
++		};
++
++		led2: user3 {
++			label = "user3";
++			gpios = <&gpio4 15 1>; /* 111 - MX6_LOCLED# */
++			default-state = "off";
++		};
++	};
++
++	memory {
++		reg = <0x10000000 0x20000000>;
++	};
++
++	pps {
++		compatible = "pps-gpio";
++		gpios = <&gpio1 26 0>;
++		status = "okay";
++	};
++
++	regulators {
++		compatible = "simple-bus";
++
++		reg_1p0v: 1p0v {
++			compatible = "regulator-fixed";
++			regulator-name = "1P0V";
++			regulator-min-microvolt = <1000000>;
++			regulator-max-microvolt = <1000000>;
++			regulator-always-on;
++		};
++
++		/* remove this fixed regulator once ltc3676__sw2 driver available */
++		reg_1p8v: 1p8v {
++			compatible = "regulator-fixed";
++			regulator-name = "1P8V";
++			regulator-min-microvolt = <1800000>;
++			regulator-max-microvolt = <1800000>;
++			regulator-always-on;
++		};
++
++		reg_3p3v: 3p3v {
++			compatible = "regulator-fixed";
++			regulator-name = "3P3V";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++			regulator-always-on;
++		};
++
++		reg_5p0v: 5p0v {
++			compatible = "regulator-fixed";
++			regulator-name = "5P0V";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			regulator-always-on;
++		};
++
++		reg_usb_otg_vbus: usb_otg_vbus {
++			compatible = "regulator-fixed";
++			regulator-name = "usb_otg_vbus";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			gpio = <&gpio3 22 0>;
++			enable-active-high;
++		};
++	};
++
++	sound {
++		compatible = "fsl,imx6q-sabrelite-sgtl5000",
++			     "fsl,imx-audio-sgtl5000";
++		model = "imx6q-sabrelite-sgtl5000";
++		ssi-controller = <&ssi1>;
++		audio-codec = <&codec>;
++		audio-routing =
++			"MIC_IN", "Mic Jack",
++			"Mic Jack", "Mic Bias",
++			"Headphone Jack", "HP_OUT";
++		mux-int-port = <1>;
++		mux-ext-port = <4>;
++	};
++};
++
++&audmux {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_audmux_1>;
++	status = "okay";
++};
++
++&fec {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_enet_1>;
++	phy-mode = "rgmii";
++	phy-reset-gpios = <&gpio1 30 0>;
++	status = "okay";
++};
++
++&gpmi {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_gpmi_nand_2>;
++	status = "okay";
++};
++
++&i2c1 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c1_1>;
++	status = "okay";
++
++	eeprom1: eeprom@50 {
++		compatible = "atmel,24c02";
++		reg = <0x50>;
++		pagesize = <16>;
++	};
++
++	eeprom2: eeprom@51 {
++		compatible = "atmel,24c02";
++		reg = <0x51>;
++		pagesize = <16>;
++	};
++
++	eeprom3: eeprom@52 {
++		compatible = "atmel,24c02";
++		reg = <0x52>;
++		pagesize = <16>;
++	};
++
++	eeprom4: eeprom@53 {
++		compatible = "atmel,24c02";
++		reg = <0x53>;
++		pagesize = <16>;
++	};
++
++	gpio: pca9555@23 {
++		compatible = "nxp,pca9555";
++		reg = <0x23>;
++		gpio-controller;
++		#gpio-cells = <2>;
++	};
++
++	hwmon: gsc@29 {
++		compatible = "gw,gsp";
++		reg = <0x29>;
++	};
++
++	rtc: ds1672@68 {
++		compatible = "dallas,ds1672";
++		reg = <0x68>;
++	};
++};
++
++&i2c2 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c2_2>;
++	status = "okay";
++
++	pciswitch: pex8609@3f {
++		compatible = "plx,pex8609";
++		reg = <0x3f>;
++	};
++
++	pmic: ltc3676@3c {
++		compatible = "ltc,ltc3676";
++		reg = <0x3c>;
++
++		regulators {
++			sw1_reg: ltc3676__sw1 {
++				regulator-min-microvolt = <1175000>;
++				regulator-max-microvolt = <1175000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			sw2_reg: ltc3676__sw2 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			sw3_reg: ltc3676__sw3 {
++				regulator-min-microvolt = <1175000>;
++				regulator-max-microvolt = <1175000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			sw4_reg: ltc3676__sw4 {
++				regulator-min-microvolt = <1500000>;
++				regulator-max-microvolt = <1500000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			ldo2_reg: ltc3676__ldo2 {
++				regulator-min-microvolt = <2500000>;
++				regulator-max-microvolt = <2500000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			ldo3_reg: ltc3676__ldo3 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			ldo4_reg: ltc3676__ldo4 {
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++			};
++		};
++	};
++};
++
++&i2c3 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c3_2>;
++	status = "okay";
++
++	accelerometer: fxos8700@1e {
++		compatible = "fsl,fxos8700";
++		reg = <0x13>;
++	};
++
++	codec: sgtl5000@0a {
++		compatible = "fsl,sgtl5000";
++		reg = <0x0a>;
++		clocks = <&clks 169>;
++		VDDA-supply = <&reg_1p8v>;
++		VDDIO-supply = <&reg_3p3v>;
++	};
++
++	touchscreen: egalax_ts@04 {
++		compatible = "eeti,egalax_ts";
++		reg = <0x04>;
++		interrupt-parent = <&gpio7>;
++		interrupts = <12 2>; /* gpio7_12 active low */
++		wakeup-gpios = <&gpio7 12 0>;
++	};
++
++	videoin: adv7180@20 {
++		compatible = "adi,adv7180";
++		reg = <0x20>;
++	};
++};
++
++&iomuxc {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_hog>;
++
++	hog {
++		pinctrl_hog: hoggrp {
++			fsl,pins = <
++				MX6QDL_PAD_EIM_A19__GPIO2_IO19   0x80000000 /* MEZZ_DIO0 */
++				MX6QDL_PAD_EIM_A20__GPIO2_IO18   0x80000000 /* MEZZ_DIO1 */
++				MX6QDL_PAD_EIM_D22__GPIO3_IO22   0x80000000 /* OTG_PWR_EN */
++				MX6QDL_PAD_EIM_D31__GPIO3_IO31   0x80000000 /* VIDDEC_PDN# */
++				MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
++				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
++				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */
++				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
++				MX6QDL_PAD_GPIO_0__CCM_CLKO1     0x000130b0 /* AUD4_MCK */
++				MX6QDL_PAD_GPIO_2__GPIO1_IO02    0x80000000 /* USB_SEL_PCI */
++				MX6QDL_PAD_GPIO_17__GPIO7_IO12   0x80000000 /* TOUCH_IRQ# */
++				MX6QDL_PAD_KEY_COL0__GPIO4_IO06  0x80000000 /* user1 led */
++				MX6QDL_PAD_KEY_ROW0__GPIO4_IO07  0x80000000 /* user2 led */
++				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15  0x80000000 /* user3 led */
++				MX6QDL_PAD_SD2_CMD__GPIO1_IO11   0x80000000 /* LVDS_TCH# */
++				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00  0x80000000 /* SD3_CD# */
++				MX6QDL_PAD_SD4_DAT3__GPIO2_IO11  0x80000000 /* UART2_EN# */
++			 >;
++		};
++	};
++};
++
++&ldb {
++	status = "okay";
++	lvds-channel@0 {
++		crtcs = <&ipu1 0>, <&ipu1 1>;
++	};
++};
++
++&pcie {
++	reset-gpio = <&gpio1 29 0>;
++	status = "okay";
++};
++
++&ssi1 {
++	fsl,mode = "i2s-slave";
++	status = "okay";
++};
++
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart1_2>;
++	status = "okay";
++};
++
++&uart2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart2_3>;
++	status = "okay";
++};
++
++&uart5 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart5_1>;
++	status = "okay";
++};
++
++&usbotg {
++	vbus-supply = <&reg_usb_otg_vbus>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usbotg_1>;
++	disable-over-current;
++	status = "okay";
++};
++
++&usbh1 {
++	status = "okay";
++};
++
++&usdhc3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usdhc3_2>;
++	cd-gpios = <&gpio7 0 0>;
++	vmmc-supply = <&reg_3p3v>;
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+@@ -0,0 +1,429 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/ {
++	/* these are used by bootloader for disabling nodes */
++	aliases {
++		can0 = &can1;
++		ethernet0 = &fec;
++		ethernet1 = &eth1;
++		led0 = &led0;
++		led1 = &led1;
++		led2 = &led2;
++		nand = &gpmi;
++		sky2 = &eth1;
++		ssi0 = &ssi1;
++		usb0 = &usbh1;
++		usb1 = &usbotg;
++		usdhc2 = &usdhc3;
++	};
++
++	chosen {
++		bootargs = "console=ttymxc1,115200";
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		led0: user1 {
++			label = "user1";
++			gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
++			default-state = "on";
++			linux,default-trigger = "heartbeat";
++		};
++
++		led1: user2 {
++			label = "user2";
++			gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
++			default-state = "off";
++		};
++
++		led2: user3 {
++			label = "user3";
++			gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
++			default-state = "off";
++		};
++	};
++
++	memory {
++		reg = <0x10000000 0x40000000>;
++	};
++
++	pps {
++		compatible = "pps-gpio";
++		gpios = <&gpio1 26 0>;
++		status = "okay";
++	};
++
++	regulators {
++		compatible = "simple-bus";
++
++		reg_1p0v: 1p0v {
++			compatible = "regulator-fixed";
++			regulator-name = "1P0V";
++			regulator-min-microvolt = <1000000>;
++			regulator-max-microvolt = <1000000>;
++			regulator-always-on;
++		};
++
++		/* remove when pmic 1p8 regulator available */
++		reg_1p8v: 1p8v {
++			compatible = "regulator-fixed";
++			regulator-name = "1P8V";
++			regulator-min-microvolt = <1800000>;
++			regulator-max-microvolt = <1800000>;
++			regulator-always-on;
++		};
++
++		reg_3p3v: 3p3v {
++			compatible = "regulator-fixed";
++			regulator-name = "3P3V";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++			regulator-always-on;
++		};
++
++		reg_usb_h1_vbus: usb_h1_vbus {
++			compatible = "regulator-fixed";
++			regulator-name = "usb_h1_vbus";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			regulator-always-on;
++		};
++
++		reg_usb_otg_vbus: usb_otg_vbus {
++			compatible = "regulator-fixed";
++			regulator-name = "usb_otg_vbus";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			gpio = <&gpio3 22 0>;
++			enable-active-high;
++		};
++	};
++
++	sound {
++		compatible = "fsl,imx6q-sabrelite-sgtl5000",
++			     "fsl,imx-audio-sgtl5000";
++		model = "imx6q-sabrelite-sgtl5000";
++		ssi-controller = <&ssi1>;
++		audio-codec = <&codec>;
++		audio-routing =
++			"MIC_IN", "Mic Jack",
++			"Mic Jack", "Mic Bias",
++			"Headphone Jack", "HP_OUT";
++		mux-int-port = <1>;
++		mux-ext-port = <4>;
++	};
++};
++
++&audmux {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_audmux_1>;
++	status = "okay";
++};
++
++&can1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_flexcan1_1>;
++	status = "okay";
++};
++
++&fec {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_enet_1>;
++	phy-mode = "rgmii";
++	phy-reset-gpios = <&gpio1 30 0>;
++	status = "okay";
++};
++
++&gpmi {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_gpmi_nand_2>;
++	status = "okay";
++};
++
++&i2c1 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c1_1>;
++	status = "okay";
++
++	eeprom1: eeprom@50 {
++		compatible = "atmel,24c02";
++		reg = <0x50>;
++		pagesize = <16>;
++	};
++
++	eeprom2: eeprom@51 {
++		compatible = "atmel,24c02";
++		reg = <0x51>;
++		pagesize = <16>;
++	};
++
++	eeprom3: eeprom@52 {
++		compatible = "atmel,24c02";
++		reg = <0x52>;
++		pagesize = <16>;
++	};
++
++	eeprom4: eeprom@53 {
++		compatible = "atmel,24c02";
++		reg = <0x53>;
++		pagesize = <16>;
++	};
++
++	gpio: pca9555@23 {
++		compatible = "nxp,pca9555";
++		reg = <0x23>;
++		gpio-controller;
++		#gpio-cells = <2>;
++	};
++
++	hwmon: gsc@29 {
++		compatible = "gw,gsp";
++		reg = <0x29>;
++	};
++
++	rtc: ds1672@68 {
++		compatible = "dallas,ds1672";
++		reg = <0x68>;
++	};
++};
++
++&i2c2 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c2_2>;
++	status = "okay";
++
++	pciclkgen: si53156@6b {
++		compatible = "sil,si53156";
++		reg = <0x6b>;
++	};
++
++	pciswitch: pex8606@3f {
++		compatible = "plx,pex8606";
++		reg = <0x3f>;
++	};
++
++	pmic: ltc3676@3c {
++		compatible = "ltc,ltc3676";
++		reg = <0x3c>;
++
++		regulators {
++			/* VDD_SOC */
++			sw1_reg: ltc3676__sw1 {
++				regulator-min-microvolt = <1175000>;
++				regulator-max-microvolt = <1175000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			/* VDD_1P8 */
++			sw2_reg: ltc3676__sw2 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			/* VDD_ARM */
++			sw3_reg: ltc3676__sw3 {
++				regulator-min-microvolt = <1175000>;
++				regulator-max-microvolt = <1175000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			/* VDD_DDR */
++			sw4_reg: ltc3676__sw4 {
++				regulator-min-microvolt = <1500000>;
++				regulator-max-microvolt = <1500000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			/* VDD_2P5 */
++			ldo2_reg: ltc3676__ldo2 {
++				regulator-min-microvolt = <2500000>;
++				regulator-max-microvolt = <2500000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			/* VDD_1P8 */
++			ldo3_reg: ltc3676__ldo3 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			/* VDD_HIGH */
++			ldo4_reg: ltc3676__ldo4 {
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++			};
++		};
++	};
++};
++
++&i2c3 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c3_2>;
++	status = "okay";
++
++	accelerometer: fxos8700@1e {
++		compatible = "fsl,fxos8700";
++		reg = <0x1e>;
++	};
++
++	codec: sgtl5000@0a {
++		compatible = "fsl,sgtl5000";
++		reg = <0x0a>;
++		clocks = <&clks 201>;
++		VDDA-supply = <&reg_1p8v>;
++		VDDIO-supply = <&reg_3p3v>;
++	};
++
++	hdmiin: adv7611@4c {
++		compatible = "adi,adv7611";
++		reg = <0x4c>;
++	};
++
++	touchscreen: egalax_ts@04 {
++		compatible = "eeti,egalax_ts";
++		reg = <0x04>;
++		interrupt-parent = <&gpio1>;
++		interrupts = <11 2>; /* gpio1_11 active low */
++		wakeup-gpios = <&gpio1 11 0>;
++	};
++
++	videoout: adv7393@2a {
++		compatible = "adi,adv7393";
++		reg = <0x2a>;
++	};
++
++	videoin: adv7180@20 {
++		compatible = "adi,adv7180";
++		reg = <0x20>;
++	};
++};
++
++&iomuxc {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_hog>;
++
++	hog {
++		pinctrl_hog: hoggrp {
++			fsl,pins = <
++				MX6QDL_PAD_EIM_A19__GPIO2_IO19    0x80000000 /* PCIE6EXP_DIO0 */
++				MX6QDL_PAD_EIM_A20__GPIO2_IO18    0x80000000 /* PCIE6EXP_DIO1 */
++				MX6QDL_PAD_EIM_D22__GPIO3_IO22    0x80000000 /* OTG_PWR_EN */
++				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27  0x80000000 /* GPS_SHDN */
++				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26  0x80000000 /* GPS_PPS */
++				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
++				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29  0x80000000 /* PCIE RST */
++				MX6QDL_PAD_GPIO_0__CCM_CLKO1      0x000130b0 /* AUD4_MCK */
++				MX6QDL_PAD_GPIO_2__GPIO1_IO02     0x80000000 /* CAN_STBY */
++				MX6QDL_PAD_GPIO_8__GPIO1_IO08     0x80000000 /* PMIC_IRQ# */
++				MX6QDL_PAD_GPIO_9__GPIO1_IO09     0x80000000 /* HUB_RST# */
++				MX6QDL_PAD_GPIO_17__GPIO7_IO12    0x80000000 /* PCIE_WDIS# */
++				MX6QDL_PAD_GPIO_19__GPIO4_IO05    0x80000000 /* ACCEL_IRQ# */
++				MX6QDL_PAD_KEY_COL0__GPIO4_IO06   0x80000000 /* user1 led */
++				MX6QDL_PAD_KEY_COL4__GPIO4_IO14   0x80000000 /* USBOTG_OC# */
++				MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x80000000 /* user2 led */
++				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15   0x80000000 /* user3 led */
++				MX6QDL_PAD_SD2_CMD__GPIO1_IO11    0x80000000 /* TOUCH_IRQ# */
++				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00   0x80000000 /* SD3_DET# */
++			 >;
++		};
++	};
++};
++
++&ldb {
++	status = "okay";
++
++	lvds-channel@1 {
++		fsl,data-mapping = "spwg";
++		fsl,data-width = <18>;
++		status = "okay";
++
++		display-timings {
++			native-mode = <&timing0>;
++			timing0: hsd100pxn1 {
++				clock-frequency = <65000000>;
++				hactive = <1024>;
++				vactive = <768>;
++				hback-porch = <220>;
++				hfront-porch = <40>;
++				vback-porch = <21>;
++				vfront-porch = <7>;
++				hsync-len = <60>;
++				vsync-len = <10>;
++			};
++		};
++	};
++};
++
++&pcie {
++	reset-gpio = <&gpio1 29 0>;
++	status = "okay";
++
++	eth1: sky2@8 { /* MAC/PHY on bus 8 */
++		compatible = "marvell,sky2";
++	};
++};
++
++&ssi1 {
++	fsl,mode = "i2s-slave";
++	status = "okay";
++};
++
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart1_2>;
++	status = "okay";
++};
++
++&uart2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart2_3>;
++	status = "okay";
++};
++
++&uart5 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart5_1>;
++	status = "okay";
++};
++
++&usbotg {
++	vbus-supply = <&reg_usb_otg_vbus>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usbotg_1>;
++	disable-over-current;
++	status = "okay";
++};
++
++&usbh1 {
++	vbus-supply = <&reg_usb_h1_vbus>;
++	status = "okay";
++};
++
++&usdhc3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usdhc3_2>;
++	cd-gpios = <&gpio7 0 0>;
++	vmmc-supply = <&reg_3p3v>;
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+@@ -0,0 +1,457 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/ {
++	/* these are used by bootloader for disabling nodes */
++	aliases {
++		can0 = &can1;
++		ethernet0 = &fec;
++		ethernet1 = &eth1;
++		led0 = &led0;
++		led1 = &led1;
++		led2 = &led2;
++		nand = &gpmi;
++		sky2 = &eth1;
++		ssi0 = &ssi1;
++		usb0 = &usbh1;
++		usb1 = &usbotg;
++		usdhc2 = &usdhc3;
++	};
++
++	chosen {
++		bootargs = "console=ttymxc1,115200";
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		led0: user1 {
++			label = "user1";
++			gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
++			default-state = "on";
++			linux,default-trigger = "heartbeat";
++		};
++
++		led1: user2 {
++			label = "user2";
++			gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
++			default-state = "off";
++		};
++
++		led2: user3 {
++			label = "user3";
++			gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
++			default-state = "off";
++		};
++	};
++
++	memory {
++		reg = <0x10000000 0x40000000>;
++	};
++
++	pps {
++		compatible = "pps-gpio";
++		gpios = <&gpio1 26 0>;
++		status = "okay";
++	};
++
++	regulators {
++		compatible = "simple-bus";
++
++		reg_1p0v: 1p0v {
++			compatible = "regulator-fixed";
++			regulator-name = "1P0V";
++			regulator-min-microvolt = <1000000>;
++			regulator-max-microvolt = <1000000>;
++			regulator-always-on;
++		};
++
++		reg_3p3v: 3p3v {
++			compatible = "regulator-fixed";
++			regulator-name = "3P3V";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++			regulator-always-on;
++		};
++
++		reg_usb_h1_vbus: usb_h1_vbus {
++			compatible = "regulator-fixed";
++			regulator-name = "usb_h1_vbus";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			regulator-always-on;
++		};
++
++		reg_usb_otg_vbus: usb_otg_vbus {
++			compatible = "regulator-fixed";
++			regulator-name = "usb_otg_vbus";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			gpio = <&gpio3 22 0>;
++			enable-active-high;
++		};
++	};
++
++	sound {
++		compatible = "fsl,imx6q-sabrelite-sgtl5000",
++			     "fsl,imx-audio-sgtl5000";
++		model = "imx6q-sabrelite-sgtl5000";
++		ssi-controller = <&ssi1>;
++		audio-codec = <&codec>;
++		audio-routing =
++			"MIC_IN", "Mic Jack",
++			"Mic Jack", "Mic Bias",
++			"Headphone Jack", "HP_OUT";
++		mux-int-port = <1>;
++		mux-ext-port = <4>;
++	};
++};
++
++&audmux {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_audmux_1>; /* AUD4<->sgtl5000 */
++	status = "okay";
++};
++
++&can1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_flexcan1_1>;
++	status = "okay";
++};
++
++&fec {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_enet_1>;
++	phy-mode = "rgmii";
++	phy-reset-gpios = <&gpio1 30 0>;
++	status = "okay";
++};
++
++&gpmi {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_gpmi_nand_2>;
++	status = "okay";
++};
++
++&i2c1 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c1_1>;
++	status = "okay";
++
++	eeprom1: eeprom@50 {
++		compatible = "atmel,24c02";
++		reg = <0x50>;
++		pagesize = <16>;
++	};
++
++	eeprom2: eeprom@51 {
++		compatible = "atmel,24c02";
++		reg = <0x51>;
++		pagesize = <16>;
++	};
++
++	eeprom3: eeprom@52 {
++		compatible = "atmel,24c02";
++		reg = <0x52>;
++		pagesize = <16>;
++	};
++
++	eeprom4: eeprom@53 {
++		compatible = "atmel,24c02";
++		reg = <0x53>;
++		pagesize = <16>;
++	};
++
++	gpio: pca9555@23 {
++		compatible = "nxp,pca9555";
++		reg = <0x23>;
++		gpio-controller;
++		#gpio-cells = <2>;
++	};
++
++	hwmon: gsc@29 {
++		compatible = "gw,gsp";
++		reg = <0x29>;
++	};
++
++	rtc: ds1672@68 {
++		compatible = "dallas,ds1672";
++		reg = <0x68>;
++	};
++};
++
++&i2c2 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c2_2>;
++	status = "okay";
++
++	pmic: pfuze100@08 {
++		compatible = "fsl,pfuze100";
++		reg = <0x08>;
++
++		regulators {
++			sw1a_reg: sw1ab {
++				regulator-min-microvolt = <300000>;
++				regulator-max-microvolt = <1875000>;
++				regulator-boot-on;
++				regulator-always-on;
++				regulator-ramp-delay = <6250>;
++			};
++
++			sw1c_reg: sw1c {
++				regulator-min-microvolt = <300000>;
++				regulator-max-microvolt = <1875000>;
++				regulator-boot-on;
++				regulator-always-on;
++				regulator-ramp-delay = <6250>;
++			};
++
++			sw2_reg: sw2 {
++				regulator-min-microvolt = <800000>;
++				regulator-max-microvolt = <3950000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			sw3a_reg: sw3a {
++				regulator-min-microvolt = <400000>;
++				regulator-max-microvolt = <1975000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			sw3b_reg: sw3b {
++				regulator-min-microvolt = <400000>;
++				regulator-max-microvolt = <1975000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			sw4_reg: sw4 {
++				regulator-min-microvolt = <800000>;
++				regulator-max-microvolt = <3300000>;
++			};
++
++			swbst_reg: swbst {
++				regulator-min-microvolt = <5000000>;
++				regulator-max-microvolt = <5150000>;
++			};
++
++			snvs_reg: vsnvs {
++				regulator-min-microvolt = <1000000>;
++				regulator-max-microvolt = <3000000>;
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			vref_reg: vrefddr {
++				regulator-boot-on;
++				regulator-always-on;
++			};
++
++			vgen1_reg: vgen1 {
++				regulator-min-microvolt = <800000>;
++				regulator-max-microvolt = <1550000>;
++			};
++
++			vgen2_reg: vgen2 {
++				regulator-min-microvolt = <800000>;
++				regulator-max-microvolt = <1550000>;
++			};
++
++			vgen3_reg: vgen3 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++			};
++
++			vgen4_reg: vgen4 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-always-on;
++			};
++
++			vgen5_reg: vgen5 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-always-on;
++			};
++
++			vgen6_reg: vgen6 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-always-on;
++			};
++		};
++	};
++
++	pciswitch: pex8609@3f {
++		compatible = "plx,pex8609";
++		reg = <0x3f>;
++	};
++
++	pciclkgen: si52147@6b {
++		compatible = "sil,si52147";
++		reg = <0x6b>;
++	};
++};
++
++&i2c3 {
++	clock-frequency = <100000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c3_2>;
++	status = "okay";
++
++	accelerometer: fxos8700@1e {
++		compatible = "fsl,fxos8700";
++		reg = <0x1e>;
++	};
++
++	codec: sgtl5000@0a {
++		compatible = "fsl,sgtl5000";
++		reg = <0x0a>;
++		clocks = <&clks 201>;
++		VDDA-supply = <&sw4_reg>;
++		VDDIO-supply = <&reg_3p3v>;
++	};
++
++	hdmiin: adv7611@4c {
++		compatible = "adi,adv7611";
++		reg = <0x4c>;
++	};
++
++	touchscreen: egalax_ts@04 {
++		compatible = "eeti,egalax_ts";
++		reg = <0x04>;
++		interrupt-parent = <&gpio7>;
++		interrupts = <12 2>; /* gpio7_12 active low */
++		wakeup-gpios = <&gpio7 12 0>;
++	};
++
++	videoout: adv7393@2a {
++		compatible = "adi,adv7393";
++		reg = <0x2a>;
++	};
++
++	videoin: adv7180@20 {
++		compatible = "adi,adv7180";
++		reg = <0x20>;
++	};
++};
++
++&iomuxc {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_hog>;
++
++	hog {
++		pinctrl_hog: hoggrp {
++			fsl,pins = <
++				MX6QDL_PAD_EIM_D22__GPIO3_IO22    0x80000000 /* OTG_PWR_EN */
++				MX6QDL_PAD_EIM_D19__GPIO3_IO19    0x80000000 /* SPINOR_CS0# */
++				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26  0x80000000 /* GPS_PPS */
++				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
++				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29  0x80000000 /* PCIE RST */
++				MX6QDL_PAD_GPIO_0__CCM_CLKO1      0x000130b0 /* AUD4_MCK */
++				MX6QDL_PAD_GPIO_2__GPIO1_IO02     0x80000000 /* CAN_STBY */
++				MX6QDL_PAD_GPIO_17__GPIO7_IO12    0x80000000 /* TOUCH_IRQ# */
++				MX6QDL_PAD_KEY_COL0__GPIO4_IO06   0x80000000 /* user1 led */
++				MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x80000000 /* user2 led */
++				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15   0x80000000 /* user3 led */
++				MX6QDL_PAD_SD1_DAT0__GPIO1_IO16   0x80000000 /* USBHUB_RST# */
++				MX6QDL_PAD_SD1_DAT3__GPIO1_IO21   0x80000000 /* MIPI_DIO */
++			 >;
++		};
++	};
++};
++
++&ldb {
++	status = "okay";
++
++	lvds-channel@1 {
++		fsl,data-mapping = "spwg";
++		fsl,data-width = <18>;
++		status = "okay";
++
++		display-timings {
++			native-mode = <&timing0>;
++			timing0: hsd100pxn1 {
++				clock-frequency = <65000000>;
++				hactive = <1024>;
++				vactive = <768>;
++				hback-porch = <220>;
++				hfront-porch = <40>;
++				vback-porch = <21>;
++				vfront-porch = <7>;
++				hsync-len = <60>;
++				vsync-len = <10>;
++			};
++		};
++	};
++};
++
++&pcie {
++	reset-gpio = <&gpio1 29 0>;
++	status = "okay";
++
++	eth1: sky2@8 { /* MAC/PHY on bus 8 */
++		compatible = "marvell,sky2";
++	};
++};
++
++&ssi1 {
++	fsl,mode = "i2s-slave";
++	status = "okay";
++};
++
++&ssi2 {
++	fsl,mode = "i2s-slave";
++	status = "okay";
++};
++
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart1_2>;
++	status = "okay";
++};
++
++&uart2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart2_3>;
++	status = "okay";
++};
++
++&uart5 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart5_1>;
++	status = "okay";
++};
++
++&usbotg {
++	vbus-supply = <&reg_usb_otg_vbus>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usbotg_1>;
++	disable-over-current;
++	status = "okay";
++};
++
++&usbh1 {
++	vbus-supply = <&reg_usb_h1_vbus>;
++	status = "okay";
++};
++
++&usdhc3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usdhc3_2>;
++	cd-gpios = <&gpio7 0 0>;
++	vmmc-supply = <&reg_3p3v>;
++	status = "okay";
++};
diff --git a/target/linux/imx6/patches-3.13/0004-imx-add-PCI-fixup-for-PEX860X-on-Gateworks-board.patch b/target/linux/imx6/patches-3.13/0004-imx-add-PCI-fixup-for-PEX860X-on-Gateworks-board.patch
new file mode 100644
index 0000000000..93f1ee4e28
--- /dev/null
+++ b/target/linux/imx6/patches-3.13/0004-imx-add-PCI-fixup-for-PEX860X-on-Gateworks-board.patch
@@ -0,0 +1,68 @@
+From 4bb1d09fe48f51efac2f51b9280796e2d00a6c4a Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey@gateworks.com>
+Date: Tue, 22 Oct 2013 21:51:28 -0700
+Subject: [PATCH] ARM: imx: add PCI fixup for PEX860X on Gateworks board
+
+The PEX860X has GPIO's which are used for PCI Reset lines on the
+Gateworks Ventana boards.  The GPIO's need to be set as output
+level high so as to allow the PCIe devices to come out of reset.
+
+Signed-off-by: Tim Harvey <tharvey@gateworks.com>
+Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
+---
+ arch/arm/mach-imx/mach-imx6q.c | 30 ++++++++++++++++++++++++++++++
+ 1 file changed, 30 insertions(+)
+
+--- a/arch/arm/mach-imx/mach-imx6q.c
++++ b/arch/arm/mach-imx/mach-imx6q.c
+@@ -13,6 +13,7 @@
+ #include <linux/clk.h>
+ #include <linux/clkdev.h>
+ #include <linux/cpu.h>
++#include <linux/delay.h>
+ #include <linux/export.h>
+ #include <linux/init.h>
+ #include <linux/io.h>
+@@ -23,6 +24,7 @@
+ #include <linux/of_irq.h>
+ #include <linux/of_platform.h>
+ #include <linux/pm_opp.h>
++#include <linux/pci.h>
+ #include <linux/phy.h>
+ #include <linux/reboot.h>
+ #include <linux/regmap.h>
+@@ -78,6 +80,34 @@ static int ksz9031rn_phy_fixup(struct ph
+ 	return 0;
+ }
+ 
++/*
++ * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
++ * as they are used for slots1-7 PERST#
++ */
++static void ventana_pciesw_early_fixup(struct pci_dev *dev)
++{
++	u32 dw;
++
++	if (!of_machine_is_compatible("gw,ventana"))
++		return;
++
++	if (dev->devfn != 0)
++		return;
++
++	pci_read_config_dword(dev, 0x62c, &dw);
++	dw |= 0xaaa8; // GPIO1-7 outputs
++	pci_write_config_dword(dev, 0x62c, dw);
++
++	pci_read_config_dword(dev, 0x644, &dw);
++	dw |= 0xfe;   // GPIO1-7 output high
++	pci_write_config_dword(dev, 0x644, dw);
++
++	msleep(100);
++}
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, ventana_pciesw_early_fixup);
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, ventana_pciesw_early_fixup);
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, ventana_pciesw_early_fixup);
++
+ static int ar8031_phy_fixup(struct phy_device *dev)
+ {
+ 	u16 val;
diff --git a/target/linux/imx6/patches-3.13/0005-PCI-designware-Fix-I-O-transfers-by-using-CPU-not-re.patch b/target/linux/imx6/patches-3.13/0005-PCI-designware-Fix-I-O-transfers-by-using-CPU-not-re.patch
new file mode 100644
index 0000000000..688de09a73
--- /dev/null
+++ b/target/linux/imx6/patches-3.13/0005-PCI-designware-Fix-I-O-transfers-by-using-CPU-not-re.patch
@@ -0,0 +1,67 @@
+From fce8591f73c6a30c231f220d1092362aae0b985c Mon Sep 17 00:00:00 2001
+From: Pratyush Anand <pratyush.anand@st.com>
+Date: Wed, 11 Dec 2013 15:08:33 +0530
+Subject: [PATCH] PCI: designware: Fix I/O transfers by using CPU (not realio)
+ address
+
+pp->io_base, which is the input of the outbound IO address translation
+unit, should be the CPU address.  It was incorrectly programmed to the
+realio address.
+
+We should pass global_io_offset rather than sys->io_offset to
+pci_ioremap_io(), so we map the new window into the first available spot in
+the Linux view of the I/O space.
+
+We must also pass CPU address instead of realio address to pci_ioremap_io().
+
+This patch fixes above issue.  It has been tested with Lecroy PTC in AIC
+mode and Pericom PI7C9X2G303EL PCIe switch, which does not work otherwise.
+
+Tested-by: Mohit Kumar <mohit.kumar@st.com>
+Tested-by: Tim Harvey <tharvey@gateworks.com>
+Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Reviewed-by: Marek Vasut <marex@denx.de
+Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
+Acked-by: Arnd Bergmann <arnd@arndb.de>
+Acked-by: Jingoo Han <jg1.han@samsung.com>
+Cc: Richard Zhu <Hong-Xing.Zhu@freescale.com>
+---
+ drivers/pci/host/pcie-designware.c | 5 ++---
+ 1 file changed, 2 insertions(+), 3 deletions(-)
+
+--- a/drivers/pci/host/pcie-designware.c
++++ b/drivers/pci/host/pcie-designware.c
+@@ -394,6 +394,7 @@ int __init dw_pcie_host_init(struct pcie
+ 					   + global_io_offset);
+ 			pp->config.io_size = resource_size(&pp->io);
+ 			pp->config.io_bus_addr = range.pci_addr;
++			pp->io_base = range.cpu_addr;
+ 		}
+ 		if (restype == IORESOURCE_MEM) {
+ 			of_pci_range_to_resource(&range, np, &pp->mem);
+@@ -419,7 +420,6 @@ int __init dw_pcie_host_init(struct pcie
+ 
+ 	pp->cfg0_base = pp->cfg.start;
+ 	pp->cfg1_base = pp->cfg.start + pp->config.cfg0_size;
+-	pp->io_base = pp->io.start;
+ 	pp->mem_base = pp->mem.start;
+ 
+ 	pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base,
+@@ -585,7 +585,6 @@ static int dw_pcie_wr_other_conf(struct
+ 	return ret;
+ }
+ 
+-
+ static int dw_pcie_valid_config(struct pcie_port *pp,
+ 				struct pci_bus *bus, int dev)
+ {
+@@ -679,7 +678,7 @@ static int dw_pcie_setup(int nr, struct
+ 
+ 	if (global_io_offset < SZ_1M && pp->config.io_size > 0) {
+ 		sys->io_offset = global_io_offset - pp->config.io_bus_addr;
+-		pci_ioremap_io(sys->io_offset, pp->io.start);
++		pci_ioremap_io(global_io_offset, pp->io_base);
+ 		global_io_offset += SZ_64K;
+ 		pci_add_resource_offset(&sys->resources, &pp->io,
+ 					sys->io_offset);
diff --git a/target/linux/imx6/patches-3.13/0040-i2c-imx-retry-on-NAK.patch b/target/linux/imx6/patches-3.13/0040-i2c-imx-retry-on-NAK.patch
new file mode 100644
index 0000000000..eec6697272
--- /dev/null
+++ b/target/linux/imx6/patches-3.13/0040-i2c-imx-retry-on-NAK.patch
@@ -0,0 +1,38 @@
+From: Tim Harvey <tharvey@gateworks.com>
+Subject: [PATCH] i2c: imx: retry on NAK
+
+In case of busy i2c try again to get ACK.
+
+Signed-off-by: Tim Harvey <tharvey@gateworks.com>
+Tested-by: Luka Perkov <luka@openwrt.org>
+---
+ drivers/i2c/busses/i2c-imx.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/drivers/i2c/busses/i2c-imx.c
++++ b/drivers/i2c/busses/i2c-imx.c
+@@ -62,6 +62,7 @@
+ 
+ /* Default value */
+ #define IMX_I2C_BIT_RATE	100000	/* 100kHz */
++#define IMX_I2C_MAX_RETRIES	3	/* number of retries to attempt */
+ 
+ /* IMX I2C registers:
+  * the I2C register offset is different between SoCs,
+@@ -298,7 +299,7 @@ static int i2c_imx_acked(struct imx_i2c_
+ {
+ 	if (imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR) & I2SR_RXAK) {
+ 		dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__);
+-		return -EIO;  /* No ACK */
++		return -EAGAIN; /* try again */
+ 	}
+ 
+ 	dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__);
+@@ -635,6 +636,7 @@ static int i2c_imx_probe(struct platform
+ 	i2c_imx->adapter.dev.parent	= &pdev->dev;
+ 	i2c_imx->adapter.nr 		= pdev->id;
+ 	i2c_imx->adapter.dev.of_node	= pdev->dev.of_node;
++	i2c_imx->adapter.retries	= IMX_I2C_MAX_RETRIES;
+ 	i2c_imx->base			= base;
+ 
+ 	/* Get I2C clock */
diff --git a/target/linux/imx6/patches-3.13/0050-sky2-allow-mac-to-come-from-dt.patch b/target/linux/imx6/patches-3.13/0050-sky2-allow-mac-to-come-from-dt.patch
new file mode 100644
index 0000000000..bab418bf26
--- /dev/null
+++ b/target/linux/imx6/patches-3.13/0050-sky2-allow-mac-to-come-from-dt.patch
@@ -0,0 +1,69 @@
+From: Tim Harvey <tharvey@gateworks.com>
+Subject: [PATCH] sky2: allow mac to come from dt
+
+The driver reads the mac address from the device registers which would
+need to have been programmed by the bootloader.  This patch adds
+the ability to pull the mac from devicetree via the aliases/sky2 node.
+
+Signed-off-by: Tim Harvey <tharvey@gateworks.com>
+---
+ drivers/net/ethernet/marvell/sky2.c | 33 ++++++++++++++++++++++++++++++++-
+ 1 file changed, 32 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/marvell/sky2.c
++++ b/drivers/net/ethernet/marvell/sky2.c
+@@ -44,6 +44,8 @@
+ #include <linux/prefetch.h>
+ #include <linux/debugfs.h>
+ #include <linux/mii.h>
++#include <linux/of_device.h>
++#include <linux/of_net.h>
+ 
+ #include <asm/irq.h>
+ 
+@@ -4748,6 +4750,7 @@ static struct net_device *sky2_init_netd
+ {
+ 	struct sky2_port *sky2;
+ 	struct net_device *dev = alloc_etherdev(sizeof(*sky2));
++	unsigned char *iap, tmpaddr[ETH_ALEN];
+ 
+ 	if (!dev)
+ 		return NULL;
+@@ -4805,8 +4808,36 @@ static struct net_device *sky2_init_netd
+ 
+ 	dev->features |= dev->hw_features;
+ 
++	/*
++	 * try to get mac address in the following order:
++	 * 1) from device tree data
++	 * 2) from internal registers set by bootloader
++	 */
++	iap = NULL;
++	if (IS_ENABLED(CONFIG_OF)) {
++		struct device_node *np;
++		np = of_find_node_by_path("/aliases");
++		if (np) {
++			const char *path = of_get_property(np, "sky2", NULL);
++			if (path)
++				np = of_find_node_by_path(path);
++			if (np)
++				path = of_get_mac_address(np);
++			if (path)
++				iap = (unsigned char *) path;
++		}
++	}
++
++	/*
++	 * 2) mac registers set by bootloader
++	 */
++	if (!iap || !is_valid_ether_addr(iap)) {
++		memcpy_fromio(&tmpaddr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
++		iap = &tmpaddr[0];
++	}
++
+ 	/* read the mac address */
+-	memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
++	memcpy(dev->dev_addr, iap, ETH_ALEN);
+ 
+ 	return dev;
+ }
diff --git a/target/linux/imx6/patches-3.13/100-bootargs.patch b/target/linux/imx6/patches-3.13/100-bootargs.patch
new file mode 100644
index 0000000000..0954391203
--- /dev/null
+++ b/target/linux/imx6/patches-3.13/100-bootargs.patch
@@ -0,0 +1,11 @@
+--- a/arch/arm/boot/dts/imx6dl-wandboard.dts
++++ b/arch/arm/boot/dts/imx6dl-wandboard.dts
+@@ -19,4 +19,8 @@
+ 	memory {
+ 		reg = <0x10000000 0x40000000>;
+ 	};
++
++	chosen {
++		bootargs = "console=ttymxc0,115200";
++	};
+ };
diff --git a/target/linux/imx6/patches-3.13/200-PCI-imx6-add-support-for-legacy-irqs.patch b/target/linux/imx6/patches-3.13/200-PCI-imx6-add-support-for-legacy-irqs.patch
new file mode 100644
index 0000000000..23e94a96a5
--- /dev/null
+++ b/target/linux/imx6/patches-3.13/200-PCI-imx6-add-support-for-legacy-irqs.patch
@@ -0,0 +1,43 @@
+From: Tim Harvey <tharvey@gateworks.com>
+Subject: [PATCH] PCI: imx6: add support for legacy irqs
+
+The i.MX6 supports legacy IRQ's via 155,154,153,152.  When devices
+are behind a PCIe-to-PCIe switch (at least for the TI XIO2001) the 
+mapping is reversed from when they are behind a PCIe switch.
+
+This patch still needs some review and clarification before going
+upstream.
+---
+ drivers/pci/host/pcie-designware.c | 21 ++++++++++++++++++++-
+ 1 file changed, 20 insertions(+), 1 deletion(-)
+
+--- a/drivers/pci/host/pcie-designware.c
++++ b/drivers/pci/host/pcie-designware.c
+@@ -711,7 +711,26 @@ static int dw_pcie_map_irq(const struct
+ {
+ 	struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
+ 
+-	return pp->irq;
++	/* TI XIO2001 PCIe-to-PCI bridge IRQs are flipped it seems */
++	if ( dev->bus && dev->bus->self
++	 && (dev->bus->self->vendor == 0x104c)
++	 && (dev->bus->self->device == 0x8240)) {
++		switch (pin) {
++		case 1: return pp->irq - 3;
++		case 2: return pp->irq - 2;
++		case 3: return pp->irq - 1;
++		case 4: return pp->irq;
++		default: return -1;
++		}
++	} else {
++		switch (pin) {
++		case 1: return pp->irq;
++		case 2: return pp->irq - 1;
++		case 3: return pp->irq - 2;
++		case 4: return pp->irq - 3;
++		default: return -1;
++		}
++	}
+ }
+ 
+ static void dw_pcie_add_bus(struct pci_bus *bus)