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| author | Luka Perkov <luka@openwrt.org> | 2013-09-20 01:59:32 +0000 |
|---|---|---|
| committer | Luka Perkov <luka@openwrt.org> | 2013-09-20 01:59:32 +0000 |
| commit | 3f059f58dba3a1fb9e1e5035b437273f095040f6 (patch) | |
| tree | 44c82a0cd9241d3fc277920c5887520abc1ca419 /target/linux/imx6/patches-3.10/011-pci-tweaks.patch | |
| parent | 19bd25f4ecd20066554eb0c4df4cbff0213a9ae5 (diff) | |
| download | upstream-3f059f58dba3a1fb9e1e5035b437273f095040f6.tar.gz upstream-3f059f58dba3a1fb9e1e5035b437273f095040f6.tar.bz2 upstream-3f059f58dba3a1fb9e1e5035b437273f095040f6.zip | |
imx6: update PCIe driver
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Luka Perkov <luka@openwrt.org>
SVN-Revision: 38080
Diffstat (limited to 'target/linux/imx6/patches-3.10/011-pci-tweaks.patch')
| -rw-r--r-- | target/linux/imx6/patches-3.10/011-pci-tweaks.patch | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/target/linux/imx6/patches-3.10/011-pci-tweaks.patch b/target/linux/imx6/patches-3.10/011-pci-tweaks.patch new file mode 100644 index 0000000000..3e0dcca7d4 --- /dev/null +++ b/target/linux/imx6/patches-3.10/011-pci-tweaks.patch @@ -0,0 +1,35 @@ +--- a/arch/arm/boot/dts/imx6qdl.dtsi ++++ b/arch/arm/boot/dts/imx6qdl.dtsi +@@ -119,7 +119,7 @@ + 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ + num-lanes = <1>; + interrupts = <0 123 0x04>; +- clocks = <&clks 189>, <&clks 187>, <&clks 205>, <&clks 144>; ++ clocks = <&clks 189>, <&clks 187>, <&clks 198>, <&clks 144>; + clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi"; + status = "disabled"; + }; +--- a/drivers/pci/host/pci-imx6.c ++++ b/drivers/pci/host/pci-imx6.c +@@ -200,12 +200,6 @@ + static int imx6q_pcie_abort_handler(unsigned long addr, + unsigned int fsr, struct pt_regs *regs) + { +- /* +- * If it was an imprecise abort, then we need to correct the +- * return address to be _after_ the instruction. +- */ +- if (fsr & (1 << 10)) +- regs->ARM_pc += 4; + return 0; + } + +@@ -322,7 +316,7 @@ + IMX6Q_GPR12_PCIE_CTL_2, 1 << 10); + + while (!dw_pcie_link_up(pp)) { +- usleep_range(100, 1000); ++ usleep_range(2000, 3000); + count++; + if (count >= 10) { + dev_err(pp->dev, "phy link never came up\n"); |