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| author | John Crispin <john@openwrt.org> | 2007-12-22 19:53:18 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2007-12-22 19:53:18 +0000 |
| commit | 70014e13845197e15045866c3a1d8755a9f265d0 (patch) | |
| tree | 1b4a6f17bc14a5d6879101a02ced51d5cb2ed8fb /target/linux/ifxmips/files | |
| parent | 2a76ef4f9adcbe8cfe4d14a5779b6f3e188fb968 (diff) | |
| download | upstream-70014e13845197e15045866c3a1d8755a9f265d0.tar.gz upstream-70014e13845197e15045866c3a1d8755a9f265d0.tar.bz2 upstream-70014e13845197e15045866c3a1d8755a9f265d0.zip | |
ifxmips pci does not cause a hang anymore, but due to lack of antenna i get no link on the atheros card, ints are flying though
SVN-Revision: 9840
Diffstat (limited to 'target/linux/ifxmips/files')
| -rw-r--r-- | target/linux/ifxmips/files/arch/mips/ifxmips/pci.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/target/linux/ifxmips/files/arch/mips/ifxmips/pci.c b/target/linux/ifxmips/files/arch/mips/ifxmips/pci.c index 3032d87c22..69caf67d7b 100644 --- a/target/linux/ifxmips/files/arch/mips/ifxmips/pci.c +++ b/target/linux/ifxmips/files/arch/mips/ifxmips/pci.c @@ -21,6 +21,8 @@ #define PCI_ACCESS_READ 0 #define PCI_ACCESS_WRITE 1 +//#define CONFIG_IFXMIPS_PCI_HW_SWAP 1 + static int ifxmips_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); static int ifxmips_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); @@ -251,7 +253,7 @@ static void __init ifxmips_pci_startup (void){ /* FPI ==> PCI IO address mapping */ /* base: 0xbAE00000 == > 0xbAE00000 */ /* size: 2M */ - writel(0xbae00000, PCI_CR_FCI_ADDR_MAP11hg); + writel(0x1ae00000, PCI_CR_FCI_ADDR_MAP11hg); /* PCI ==> FPI address mapping */ /* base: 0x0 ==> 0x0 */ @@ -262,7 +264,7 @@ static void __init ifxmips_pci_startup (void){ writel(0, PCI_CS_BASE_ADDR1); #ifdef CONFIG_IFXMIPS_PCI_HW_SWAP /* both TX and RX endian swap are enabled */ - IFXMIPS_PCI_REG32 (PCI_CR_PCI_EOI_REG) |= 3; + writel(readl(PCI_CR_PCI_EOI) | 3, PCI_CR_PCI_EOI); wmb (); #endif /*TODO: disable BAR2 & BAR3 - why was this in the origianl infineon code */ @@ -280,7 +282,6 @@ static void __init ifxmips_pci_startup (void){ } int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin){ - printk("\n\n\n%s:%s[%d] %d %d\n", __FILE__, __func__, __LINE__, slot, pin); switch (slot) { case 13: /* IDSEL = AD29 --> USB Host Controller */ |