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| author | Daniel Golle <daniel@makrotopia.org> | 2023-04-22 01:52:04 +0100 |
|---|---|---|
| committer | Daniel Golle <daniel@makrotopia.org> | 2023-04-22 04:08:41 +0100 |
| commit | 998b9731577dedc7747dcfa412e4543dabaaa131 (patch) | |
| tree | cdfb9272d251a4b8095e39b63a0de18592d21f77 /target/linux/generic/pending-5.15/721-net-phy-realtek-rtl8221-allow-to-configure-SERDES-mo.patch | |
| parent | b64c471b8ee3dd7ddfa3b11bf3f1414258c41c94 (diff) | |
| download | upstream-998b9731577dedc7747dcfa412e4543dabaaa131.tar.gz upstream-998b9731577dedc7747dcfa412e4543dabaaa131.tar.bz2 upstream-998b9731577dedc7747dcfa412e4543dabaaa131.zip | |
kernel: net: phy: realtek: improve RealTek 2.5G PHY driver
* use interface mode switching only when operating in C45 mode
Linux prevents switching the interface mode when using C22 MDIO,
hence use rate-adapter mode in case the PHY controlled via C22.
* use phy_read_paged where appropriate
* use existing generic inline functions to handle 10GbE advertisements
instead of redundantly defining register macros in realtek.c which
are not actually vendor-specific.
* make sure 10GbE advertisement is valid, preventing false-positive
warning "Downshift occurred from negotiated speed 2.5Gbps to actual
speed 1Gbps, check cabling!" with some link-partners using 1G mode.
* Support Link Down Power Saving Mode (ALDPS)
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Diffstat (limited to 'target/linux/generic/pending-5.15/721-net-phy-realtek-rtl8221-allow-to-configure-SERDES-mo.patch')
| -rw-r--r-- | target/linux/generic/pending-5.15/721-net-phy-realtek-rtl8221-allow-to-configure-SERDES-mo.patch | 43 |
1 files changed, 24 insertions, 19 deletions
diff --git a/target/linux/generic/pending-5.15/721-net-phy-realtek-rtl8221-allow-to-configure-SERDES-mo.patch b/target/linux/generic/pending-5.15/721-net-phy-realtek-rtl8221-allow-to-configure-SERDES-mo.patch index 703a0b8b72..c93fe42273 100644 --- a/target/linux/generic/pending-5.15/721-net-phy-realtek-rtl8221-allow-to-configure-SERDES-mo.patch +++ b/target/linux/generic/pending-5.15/721-net-phy-realtek-rtl8221-allow-to-configure-SERDES-mo.patch @@ -39,7 +39,7 @@ Signed-off-by: Alexander Couzens <lynxis@fe80.eu> #define RTL8366RB_POWER_SAVE 0x15 #define RTL8366RB_POWER_SAVE_ON BIT(12) -@@ -841,6 +850,43 @@ static irqreturn_t rtl9000a_handle_inter +@@ -841,6 +850,48 @@ static irqreturn_t rtl9000a_handle_inter return IRQ_HANDLED; } @@ -48,8 +48,13 @@ Signed-off-by: Alexander Couzens <lynxis@fe80.eu> + u16 option_mode; + + switch (phydev->interface) { -+ case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_2500BASEX: ++ if (!phydev->is_c45) { ++ option_mode = RTL8221B_SERDES_OPTION_MODE_2500BASEX; ++ break; ++ } ++ fallthrough; ++ case PHY_INTERFACE_MODE_SGMII: + option_mode = RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII; + break; + default: @@ -57,24 +62,24 @@ Signed-off-by: Alexander Couzens <lynxis@fe80.eu> + } + + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, -+ 0x75f3, 0); ++ 0x75f3, 0); + + phy_modify_mmd_changed(phydev, RTL8221B_MMD_SERDES_CTRL, + RTL8221B_SERDES_OPTION, + RTL8221B_SERDES_OPTION_MODE_MASK, option_mode); + switch (option_mode) { -+ case RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII: -+ case RTL8221B_SERDES_OPTION_MODE_2500BASEX: -+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6a04, 0x0503); -+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f10, 0xd455); -+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f11, 0x8020); -+ break; -+ case RTL8221B_SERDES_OPTION_MODE_HISGMII_SGMII: -+ case RTL8221B_SERDES_OPTION_MODE_HISGMII: -+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6a04, 0x0503); -+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f10, 0xd433); -+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f11, 0x8020); -+ break; ++ case RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII: ++ case RTL8221B_SERDES_OPTION_MODE_2500BASEX: ++ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6a04, 0x0503); ++ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f10, 0xd455); ++ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f11, 0x8020); ++ break; ++ case RTL8221B_SERDES_OPTION_MODE_HISGMII_SGMII: ++ case RTL8221B_SERDES_OPTION_MODE_HISGMII: ++ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6a04, 0x0503); ++ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f10, 0xd433); ++ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f11, 0x8020); ++ break; + } + + return 0; @@ -83,19 +88,19 @@ Signed-off-by: Alexander Couzens <lynxis@fe80.eu> static struct phy_driver realtek_drvs[] = { { PHY_ID_MATCH_EXACT(0x00008201), -@@ -981,6 +1027,7 @@ static struct phy_driver realtek_drvs[] +@@ -981,6 +1032,7 @@ static struct phy_driver realtek_drvs[] PHY_ID_MATCH_EXACT(0x001cc849), .name = "RTL8221B-VB-CG 2.5Gbps PHY", .get_features = rtl822x_get_features, -+ .config_init = rtl8221b_config_init, ++ .config_init = rtl8221b_config_init, .config_aneg = rtl822x_config_aneg, .read_status = rtl822x_read_status, .suspend = genphy_suspend, -@@ -992,6 +1039,7 @@ static struct phy_driver realtek_drvs[] +@@ -992,6 +1044,7 @@ static struct phy_driver realtek_drvs[] .name = "RTL8221B-VM-CG 2.5Gbps PHY", .get_features = rtl822x_get_features, .config_aneg = rtl822x_config_aneg, -+ .config_init = rtl8221b_config_init, ++ .config_init = rtl8221b_config_init, .read_status = rtl822x_read_status, .suspend = genphy_suspend, .resume = rtlgen_resume, |