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| author | Rui Salvaterra <rsalvaterra@gmail.com> | 2022-01-16 12:53:21 +0000 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2022-01-16 20:51:14 +0100 |
| commit | 61e58f7cecb9f6044375dd7839f56a6e07807903 (patch) | |
| tree | 98dd9710ba87d1aa00f4d398c6af080cace49b34 /target/linux/generic/pending-5.10/850-0013-PCI-aardvark-Add-support-for-ERR-interrupt-on-emulat.patch | |
| parent | 7229981994d3459e9bd5911b3e36fd09ab4ec428 (diff) | |
| download | upstream-61e58f7cecb9f6044375dd7839f56a6e07807903.tar.gz upstream-61e58f7cecb9f6044375dd7839f56a6e07807903.tar.bz2 upstream-61e58f7cecb9f6044375dd7839f56a6e07807903.zip | |
kernel: bump 5.10 to 5.10.92
Patches automatically rebased.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Diffstat (limited to 'target/linux/generic/pending-5.10/850-0013-PCI-aardvark-Add-support-for-ERR-interrupt-on-emulat.patch')
| -rw-r--r-- | target/linux/generic/pending-5.10/850-0013-PCI-aardvark-Add-support-for-ERR-interrupt-on-emulat.patch | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/target/linux/generic/pending-5.10/850-0013-PCI-aardvark-Add-support-for-ERR-interrupt-on-emulat.patch b/target/linux/generic/pending-5.10/850-0013-PCI-aardvark-Add-support-for-ERR-interrupt-on-emulat.patch index 9b15b7917e..5beca606d0 100644 --- a/target/linux/generic/pending-5.10/850-0013-PCI-aardvark-Add-support-for-ERR-interrupt-on-emulat.patch +++ b/target/linux/generic/pending-5.10/850-0013-PCI-aardvark-Add-support-for-ERR-interrupt-on-emulat.patch @@ -28,8 +28,6 @@ Signed-off-by: Marek Behún <kabel@kernel.org> drivers/pci/controller/pci-aardvark.c | 36 ++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) -diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c -index e6cfee3b41a2..7956b103d3c7 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -97,6 +97,10 @@ @@ -43,7 +41,7 @@ index e6cfee3b41a2..7956b103d3c7 100644 #define PCIE_ISR0_INTX_ASSERT(val) BIT(16 + (val)) #define PCIE_ISR0_INTX_DEASSERT(val) BIT(20 + (val)) #define PCIE_ISR0_ALL_MASK GENMASK(31, 0) -@@ -785,11 +789,15 @@ advk_pci_bridge_emul_base_conf_read(struct pci_bridge_emul *bridge, +@@ -785,11 +789,15 @@ advk_pci_bridge_emul_base_conf_read(stru case PCI_INTERRUPT_LINE: { /* * From the whole 32bit register we support reading from HW only @@ -60,7 +58,7 @@ index e6cfee3b41a2..7956b103d3c7 100644 if (advk_readl(pcie, PCIE_CORE_CTRL1_REG) & HOT_RESET_GEN) val |= PCI_BRIDGE_CTL_BUS_RESET << 16; else -@@ -815,6 +823,19 @@ advk_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge, +@@ -815,6 +823,19 @@ advk_pci_bridge_emul_base_conf_write(str break; case PCI_INTERRUPT_LINE: @@ -80,7 +78,7 @@ index e6cfee3b41a2..7956b103d3c7 100644 if (mask & (PCI_BRIDGE_CTL_BUS_RESET << 16)) { u32 val = advk_readl(pcie, PCIE_CORE_CTRL1_REG); if (new & (PCI_BRIDGE_CTL_BUS_RESET << 16)) -@@ -1464,6 +1485,19 @@ static void advk_pcie_handle_int(struct advk_pcie *pcie) +@@ -1464,6 +1485,19 @@ static void advk_pcie_handle_int(struct isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG); isr1_status = isr1_val & ((~isr1_mask) & PCIE_ISR1_ALL_MASK); @@ -100,6 +98,3 @@ index e6cfee3b41a2..7956b103d3c7 100644 /* Process MSI interrupts */ if (isr0_status & PCIE_ISR0_MSI_INT_PENDING) advk_pcie_handle_msi(pcie); --- -2.34.1 - |