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| author | Marek Behún <kabel@kernel.org> | 2022-01-10 02:12:45 +0100 |
|---|---|---|
| committer | Christian Lamparter <chunkeey@gmail.com> | 2022-01-15 17:26:55 +0100 |
| commit | 080691d7b1af67205081dff5a7fc4a988e080981 (patch) | |
| tree | 992b0fe2b9b326304a196a4528dea166a5f92630 /target/linux/generic/pending-5.10/850-0012-PCI-aardvark-Enable-MSI-X-support.patch | |
| parent | 612e1c68016495d69dc87eac5c1b1c845532d2a7 (diff) | |
| download | upstream-080691d7b1af67205081dff5a7fc4a988e080981.tar.gz upstream-080691d7b1af67205081dff5a7fc4a988e080981.tar.bz2 upstream-080691d7b1af67205081dff5a7fc4a988e080981.zip | |
kernel: 5.10: Backport pending pci-aardvark changes fixing MSI support
Backport Aardvark PCIe controller driver changes that fix MSI support,
that were recently sent to the linux-pci mailing list [1].
These changes fix MSI and MSI-X support for this PCIe controller, which,
among other things, make it possible to use NVMe drives with this PCIe
controllers.
[1] https://lore.kernel.org/linux-pci/20220110015018.26359-1-kabel@kernel.org/
Signed-off-by: Marek Behún <kabel@kernel.org>
Diffstat (limited to 'target/linux/generic/pending-5.10/850-0012-PCI-aardvark-Enable-MSI-X-support.patch')
| -rw-r--r-- | target/linux/generic/pending-5.10/850-0012-PCI-aardvark-Enable-MSI-X-support.patch | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/target/linux/generic/pending-5.10/850-0012-PCI-aardvark-Enable-MSI-X-support.patch b/target/linux/generic/pending-5.10/850-0012-PCI-aardvark-Enable-MSI-X-support.patch new file mode 100644 index 0000000000..d5d4005445 --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0012-PCI-aardvark-Enable-MSI-X-support.patch @@ -0,0 +1,43 @@ +From 735a4ac9782b96fbe1543c578aa8334364f21abd Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org> +Date: Fri, 2 Apr 2021 14:05:24 +0200 +Subject: [PATCH] PCI: aardvark: Enable MSI-X support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +According to PCI 3.0 specification, sending both MSI and MSI-X interrupts +is done by DWORD memory write operation to doorbell message address. The +write operation for MSI has zero upper 16 bits and the MSI interrupt number +in the lower 16 bits, while the write operation for MSI-X contains a 32-bit +value from MSI-X table. + +Since the driver only uses interrupt numbers from range 0..31, the upper +16 bits of the DWORD memory write operation to doorbell message address +are zero even for MSI-X interrupts. Thus we can enable MSI-X interrupts. + +Testing proves that kernel can correctly receive MSI-X interrupts from PCIe +cards which supports both MSI and MSI-X interrupts. + +Signed-off-by: Pali Rohár <pali@kernel.org> +Signed-off-by: Marek Behún <kabel@kernel.org> +--- + drivers/pci/controller/pci-aardvark.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c +index 76a65c592b5c..e6cfee3b41a2 100644 +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1342,7 +1342,7 @@ static struct irq_chip advk_msi_irq_chip = { + + static struct msi_domain_info advk_msi_domain_info = { + .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | +- MSI_FLAG_MULTI_PCI_MSI, ++ MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX, + .chip = &advk_msi_irq_chip, + }; + +-- +2.34.1 + |