diff options
| author | John Audia <graysky@archlinux.us> | 2022-04-08 12:35:54 -0400 |
|---|---|---|
| committer | Daniel Golle <daniel@makrotopia.org> | 2022-04-10 16:31:42 +0100 |
| commit | 662d1f9f8db3e8bd295dc93b9fd5383741bbadf5 (patch) | |
| tree | 0d21d15c65fad1201fe2ff0ac08c0937455583e5 /target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch | |
| parent | 40566daa9abc3d07e5d5c1c0c89501f40e4d7f79 (diff) | |
| download | upstream-662d1f9f8db3e8bd295dc93b9fd5383741bbadf5.tar.gz upstream-662d1f9f8db3e8bd295dc93b9fd5383741bbadf5.tar.bz2 upstream-662d1f9f8db3e8bd295dc93b9fd5383741bbadf5.zip | |
kernel: bump 5.10 to 5.10.110
Removed upstreamed:
generic/backport-5.10/350-v5.18-MIPS-pgalloc-fix-memory-leak-caused-by-pgd_free.patch
generic/pending-5.10/850-0014-PCI-aardvark-Fix-reading-PCI_EXP_RTSTA_PME-bit-on-em.patch
ipq40xx/patches-5.10/105-ipq40xx-fix-sleep-clock.patch
All patches automatically rebased.
Build system: x86_64
Build-tested: bcm2711/RPi4B, mt7622/RT3200
Run-tested: bcm2711/RPi4B, mt7622/RT3200
Compile-/run-tested: ath79/generic (Archer C7 v2).
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
[rebased in 22.03 tree]
Signed-off-by: John Audia <graysky@archlinux.us>
(cherry picked from commit b92ec82235b996ece32bc84af177adf1a4dcb90e)
Diffstat (limited to 'target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch')
| -rw-r--r-- | target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch b/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch index fecd19166c..cae329a582 100644 --- a/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch +++ b/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch @@ -29,7 +29,7 @@ Signed-off-by: Marek Behún <kabel@kernel.org> /* PIO registers base address and register offsets */ #define PIO_BASE_ADDR 0x4000 #define PIO_CTRL (PIO_BASE_ADDR + 0x0) -@@ -966,7 +962,7 @@ static int advk_sw_pci_bridge_init(struc +@@ -968,7 +964,7 @@ static int advk_sw_pci_bridge_init(struc bridge->conf.pref_mem_limit = cpu_to_le16(PCI_PREF_RANGE_TYPE_64); /* Support interrupt A for MSI feature */ |