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authorJohn Crispin <john@openwrt.org>2016-03-16 09:27:14 +0000
committerJohn Crispin <john@openwrt.org>2016-03-16 09:27:14 +0000
commit4d6c4994fc609ac40884631ced2d4e4127c8958e (patch)
tree6da1e874f0939f02862eee5ccd6a0717dbd122cf /target/linux/generic/patches-4.4/103-MIPS-smp.c-Fix-uninitialised-temp_foreign_map.patch
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ar71xx: Use PHY fixups for Open Mesh MR1750
The delays of PHY/MAC on the MR1750 are done by u-boot and OpenWrt in different ways. u-boot only modifies the ETH_CFG of the QCA955x based on the link speed. But OpenWrt can only modify the PHY delays based on the link speed. This can lead to communication problems when u-boot initializes the ETH_CFG for a specific link speed (e.g. 10BASE-T) but then OpenWrt the sets the PHY delays to an incompatible value. Instead reset the ETH_CFG delay bits of the QCA955x to a specific value and only rely on the AT803x PHY settings. Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com> SVN-Revision: 49031
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