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| author | Kevin Darbyshire-Bryant <kevin@darbyshire-bryant.me.uk> | 2017-05-15 15:03:47 +0100 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2017-05-21 21:48:16 +0200 |
| commit | 088e28772c504ad622ba909b0f6d2986910e7a97 (patch) | |
| tree | 9bb961a4819da65df64f0088780395fa5ccf2426 /target/linux/generic/patches-4.4/062-03-MIPS-Only-change-28-to-thread_info-if-coming-from-us.patch | |
| parent | 0a05fbd1356631a1f903adcd63ffb05550537667 (diff) | |
| download | upstream-088e28772c504ad622ba909b0f6d2986910e7a97.tar.gz upstream-088e28772c504ad622ba909b0f6d2986910e7a97.tar.bz2 upstream-088e28772c504ad622ba909b0f6d2986910e7a97.zip | |
kernel: update kernel 4.4 to version 4.4.69
Refresh patches. A number of patches have landed upstream & hence are no
longer required locally:
062-[1-6]-MIPS-* series
042-0004-mtd-bcm47xxpart-fix-parsing-first-block
Reintroduced lantiq/patches-4.4/0050-MIPS-Lantiq-Fix-cascaded-IRQ-setup
as it was incorrectly included upstream thus dropped from LEDE.
As it has now been reverted upstream it needs to be included again for
LEDE.
Run tested ar71xx Archer C7 v2 and lantiq.
Signed-off-by: Kevin Darbyshire-Bryant <kevin@darbyshire-bryant.me.uk>
[update from 4.4.68 to 4.4.69]
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/generic/patches-4.4/062-03-MIPS-Only-change-28-to-thread_info-if-coming-from-us.patch')
| -rw-r--r-- | target/linux/generic/patches-4.4/062-03-MIPS-Only-change-28-to-thread_info-if-coming-from-us.patch | 48 |
1 files changed, 0 insertions, 48 deletions
diff --git a/target/linux/generic/patches-4.4/062-03-MIPS-Only-change-28-to-thread_info-if-coming-from-us.patch b/target/linux/generic/patches-4.4/062-03-MIPS-Only-change-28-to-thread_info-if-coming-from-us.patch deleted file mode 100644 index e13c67be60..0000000000 --- a/target/linux/generic/patches-4.4/062-03-MIPS-Only-change-28-to-thread_info-if-coming-from-us.patch +++ /dev/null @@ -1,48 +0,0 @@ -From: Matt Redfearn <matt.redfearn@imgtec.com> -Date: Mon, 19 Dec 2016 14:20:58 +0000 -Subject: [PATCH] MIPS: Only change $28 to thread_info if coming from user - mode - -The SAVE_SOME macro is used to save the execution context on all -exceptions. -If an exception occurs while executing user code, the stack is switched -to the kernel's stack for the current task, and register $28 is switched -to point to the current_thread_info, which is at the bottom of the stack -region. -If the exception occurs while executing kernel code, the stack is left, -and this change ensures that register $28 is not updated. This is the -correct behaviour when the kernel can be executing on the separate irq -stack, because the thread_info will not be at the base of it. - -With this change, register $28 is only switched to it's kernel -conventional usage of the currrent thread info pointer at the point at -which execution enters kernel space. Doing it on every exception was -redundant, but OK without an IRQ stack, but will be erroneous once that -is introduced. - -Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> -Reviewed-by: Maciej W. Rozycki <macro@imgtec.com> ---- - ---- a/arch/mips/include/asm/stackframe.h -+++ b/arch/mips/include/asm/stackframe.h -@@ -216,12 +216,19 @@ - LONG_S $25, PT_R25(sp) - LONG_S $28, PT_R28(sp) - LONG_S $31, PT_R31(sp) -+ -+ /* Set thread_info if we're coming from user mode */ -+ mfc0 k0, CP0_STATUS -+ sll k0, 3 /* extract cu0 bit */ -+ bltz k0, 9f -+ - ori $28, sp, _THREAD_MASK - xori $28, _THREAD_MASK - #ifdef CONFIG_CPU_CAVIUM_OCTEON - .set mips64 - pref 0, 0($28) /* Prefetch the current pointer */ - #endif -+9: - .set pop - .endm - |