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| author | Felix Fietkau <nbd@nbd.name> | 2018-04-07 13:02:08 +0200 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2018-04-08 09:14:23 +0200 |
| commit | 17a955d4d7ea36ee41e025d61e600ee143f58b97 (patch) | |
| tree | 15fef93ed42ed4502db5b493e088f3a78c6a71b7 /target/linux/generic/files | |
| parent | eda27d755729b65e3620e60dc0340a39b0d9e0f1 (diff) | |
| download | upstream-17a955d4d7ea36ee41e025d61e600ee143f58b97.tar.gz upstream-17a955d4d7ea36ee41e025d61e600ee143f58b97.tar.bz2 upstream-17a955d4d7ea36ee41e025d61e600ee143f58b97.zip | |
ar8216: reduce latency by inserting scheduling points into code hogging the CPU
Should reduce network related latency caused by accessing MIB counters
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'target/linux/generic/files')
| -rw-r--r-- | target/linux/generic/files/drivers/net/phy/ar8216.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.c b/target/linux/generic/files/drivers/net/phy/ar8216.c index 61811370de..7512ee1b43 100644 --- a/target/linux/generic/files/drivers/net/phy/ar8216.c +++ b/target/linux/generic/files/drivers/net/phy/ar8216.c @@ -355,6 +355,7 @@ ar8xxx_reg_wait(struct ar8xxx_priv *priv, u32 reg, u32 mask, u32 val, return 0; usleep_range(1000, 2000); + cond_resched(); } return -ETIMEDOUT; @@ -426,6 +427,7 @@ ar8xxx_mib_fetch_port_stat(struct ar8xxx_priv *priv, int port, bool flush) mib_stats[i] = 0; else mib_stats[i] += t; + cond_resched(); } } @@ -565,6 +567,7 @@ ar8216_wait_bit(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val) break; udelay(10); + cond_resched(); } pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n", @@ -730,8 +733,10 @@ ar8216_wait_atu_ready(struct ar8xxx_priv *priv, u16 r2, u16 r1) { int timeout = 20; - while (ar8xxx_mii_read32(priv, r2, r1) & AR8216_ATU_ACTIVE && --timeout) - udelay(10); + while (ar8xxx_mii_read32(priv, r2, r1) & AR8216_ATU_ACTIVE && --timeout) { + udelay(10); + cond_resched(); + } if (!timeout) pr_err("ar8216: timeout waiting for atu to become ready\n"); |