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authorRam Chandra Jangir <rjangir@codeaurora.org>2018-12-05 19:56:32 +0530
committerJohn Crispin <john@phrozen.org>2018-12-06 08:15:27 +0100
commitbf7719f22c1f189a350f845b27189efab96b0000 (patch)
treee429ddfce45849ba06329a7330dd49dcf7145553 /target/linux/generic/files/drivers/net/phy/ar8216.h
parent99e212171abf44d6e0f7e7ba50a229ad7b3f3a34 (diff)
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kernel: ar83xx: Add support for three GMAC's connection
We have IPQ8064 AP161 board which has three GMAC's * RGMII x2 * SGMII x1. The existing ar8327 driver does not have support for three GMAC's connection, hence this change adds support for the same. This has been verified on AP148 and AP161 board. Signed-off-by: xiaofeis <xiaofeis@codeaurora.org> Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
Diffstat (limited to 'target/linux/generic/files/drivers/net/phy/ar8216.h')
-rw-r--r--target/linux/generic/files/drivers/net/phy/ar8216.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.h b/target/linux/generic/files/drivers/net/phy/ar8216.h
index 509818c50d..33f505cbe2 100644
--- a/target/linux/generic/files/drivers/net/phy/ar8216.h
+++ b/target/linux/generic/files/drivers/net/phy/ar8216.h
@@ -413,6 +413,7 @@ struct ar8xxx_chip {
void (*get_arl_entry)(struct ar8xxx_priv *priv, struct arl_entry *a,
u32 *status, enum arl_op op);
int (*sw_hw_apply)(struct switch_dev *dev);
+ void (*phy_rgmii_set)(struct ar8xxx_priv *priv, struct phy_device *phydev);
const struct ar8xxx_mib_desc *mib_decs;
unsigned num_mibs;
@@ -478,6 +479,9 @@ u32
ar8xxx_rmw(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val);
void
+ar8xxx_phy_dbg_read(struct ar8xxx_priv *priv, int phy_addr,
+ u16 dbg_addr, u16 *dbg_data);
+void
ar8xxx_phy_dbg_write(struct ar8xxx_priv *priv, int phy_addr,
u16 dbg_addr, u16 dbg_data);
void