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authorFelix Fietkau <nbd@openwrt.org>2015-07-15 08:17:28 +0000
committerFelix Fietkau <nbd@openwrt.org>2015-07-15 08:17:28 +0000
commit00e599b0b7ff50c78a1b6ac2f2db1478f6bca358 (patch)
tree023aaced6bddb939dd27edae4d5b234993b9d74a /target/linux/generic/files/drivers/net/phy/ar8216.h
parent2666403c3a850088a440d65f1a49004f1e9d926c (diff)
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ar8216: add ARL table flushing per port
Adds functions for flushing ARL table entries per port. Successfully tested on AR8327. Implementation for AR8216/AR8236/AR8316 is based on the AR8236 datasheet and assumes that the three chips share a common ATU register layout. Compile-tested only for AR8216/AR8236/AR8316. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 46380
Diffstat (limited to 'target/linux/generic/files/drivers/net/phy/ar8216.h')
-rw-r--r--target/linux/generic/files/drivers/net/phy/ar8216.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.h b/target/linux/generic/files/drivers/net/phy/ar8216.h
index 934a8b5cc1..5abbd55cc1 100644
--- a/target/linux/generic/files/drivers/net/phy/ar8216.h
+++ b/target/linux/generic/files/drivers/net/phy/ar8216.h
@@ -85,11 +85,12 @@
#define AR8216_ATU_OP_FLUSH 0x1
#define AR8216_ATU_OP_LOAD 0x2
#define AR8216_ATU_OP_PURGE 0x3
-#define AR8216_ATU_OP_FLUSH_LOCKED 0x4
-#define AR8216_ATU_OP_FLUSH_UNICAST 0x5
+#define AR8216_ATU_OP_FLUSH_UNLOCKED 0x4
+#define AR8216_ATU_OP_FLUSH_PORT 0x5
#define AR8216_ATU_OP_GET_NEXT 0x6
#define AR8216_ATU_ACTIVE BIT(3)
#define AR8216_ATU_PORT_NUM BITS(8, 4)
+#define AR8216_ATU_PORT_NUM_S 8
#define AR8216_ATU_FULL_VIO BIT(12)
#define AR8216_ATU_ADDR5 BITS(16, 8)
#define AR8216_ATU_ADDR5_S 16
@@ -397,6 +398,7 @@ struct ar8xxx_chip {
u32 (*read_port_status)(struct ar8xxx_priv *priv, int port);
u32 (*read_port_eee_status)(struct ar8xxx_priv *priv, int port);
int (*atu_flush)(struct ar8xxx_priv *priv);
+ int (*atu_flush_port)(struct ar8xxx_priv *priv, int port);
void (*vtu_flush)(struct ar8xxx_priv *priv);
void (*vtu_load_vlan)(struct ar8xxx_priv *priv, u32 vid, u32 port_mask);
void (*phy_fixup)(struct ar8xxx_priv *priv, int phy);