diff options
| author | Felix Fietkau <nbd@nbd.name> | 2020-09-13 09:34:37 +0200 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2020-09-13 11:14:32 +0200 |
| commit | f0cc5f6c0a72b7da9ed5915cf561e2f81d514c68 (patch) | |
| tree | 87523c6da3cfdbd48968d21eacb3049508ea21a9 /target/linux/generic/backport-5.4/761-net-ethernet-mediatek-Refine-the-timing-of-GDM-PSE-s.patch | |
| parent | 17e64b9447959858c5c85f7f6c98264775585711 (diff) | |
| download | upstream-f0cc5f6c0a72b7da9ed5915cf561e2f81d514c68.tar.gz upstream-f0cc5f6c0a72b7da9ed5915cf561e2f81d514c68.tar.bz2 upstream-f0cc5f6c0a72b7da9ed5915cf561e2f81d514c68.zip | |
ramips/mediatek: improve GRO performance, fix PPE packet parsing
Backport upstream changes to initialize GDM settings and reset PPE
Allow GMAC to recognize the special tag to fix PPE packet parsing
Improve GRO performance by passing PPE L4 hash as skb hash
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'target/linux/generic/backport-5.4/761-net-ethernet-mediatek-Refine-the-timing-of-GDM-PSE-s.patch')
| -rw-r--r-- | target/linux/generic/backport-5.4/761-net-ethernet-mediatek-Refine-the-timing-of-GDM-PSE-s.patch | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/target/linux/generic/backport-5.4/761-net-ethernet-mediatek-Refine-the-timing-of-GDM-PSE-s.patch b/target/linux/generic/backport-5.4/761-net-ethernet-mediatek-Refine-the-timing-of-GDM-PSE-s.patch new file mode 100644 index 0000000000..cdcd6a1a33 --- /dev/null +++ b/target/linux/generic/backport-5.4/761-net-ethernet-mediatek-Refine-the-timing-of-GDM-PSE-s.patch @@ -0,0 +1,45 @@ +From: MarkLee <Mark-MC.Lee@mediatek.com> +Date: Wed, 13 Nov 2019 10:38:43 +0800 +Subject: [PATCH] net: ethernet: mediatek: Refine the timing of GDM/PSE setup + +Refine the timing of GDM/PSE setup, move it from mtk_hw_init +to mtk_open. This is recommended by the mt762x HW design to +do GDM/PSE setup only after PDMA has been started. + +We exclude mt7628 in mtk_gdm_config function since it is a old IP +and there is no GDM/PSE block on it. + +Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com> +Signed-off-by: David S. Miller <davem@davemloft.net> +--- + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -2215,6 +2215,9 @@ static void mtk_gdm_config(struct mtk_et + { + int i; + ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) ++ return; ++ + for (i = 0; i < MTK_MAC_COUNT; i++) { + u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i)); + +@@ -2253,6 +2256,8 @@ static int mtk_open(struct net_device *d + if (err) + return err; + ++ mtk_gdm_config(eth, MTK_GDMA_TO_PDMA); ++ + napi_enable(ð->tx_napi); + napi_enable(ð->rx_napi); + mtk_tx_irq_enable(eth, MTK_TX_DONE_INT); +@@ -2436,8 +2441,6 @@ static int mtk_hw_init(struct mtk_eth *e + mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2); + mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP); + +- mtk_gdm_config(eth, MTK_GDMA_TO_PDMA); +- + return 0; + + err_disable_pm: |