diff options
author | Christian Marangi <ansuelsmth@gmail.com> | 2022-09-13 19:04:12 +0200 |
---|---|---|
committer | Christian Marangi <ansuelsmth@gmail.com> | 2022-09-19 15:19:54 +0200 |
commit | 691b3dd35e3a0d32784f5295a535537b93726121 (patch) | |
tree | 82703d5492100bb11671fa67735e55e195c7b952 /target/linux/generic/backport-5.15/775-v6.0-03-net-ethernet-stmicro-stmmac-move-dma-conf-to-dedicat.patch | |
parent | 7ace30aeb6ff58b4de845dd4722b281afd0c7eae (diff) | |
download | upstream-691b3dd35e3a0d32784f5295a535537b93726121.tar.gz upstream-691b3dd35e3a0d32784f5295a535537b93726121.tar.bz2 upstream-691b3dd35e3a0d32784f5295a535537b93726121.zip |
generic: 5.15: backport stmmac patches to change MTU
Backport stmmac patches to change MTU while the interface is up.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Diffstat (limited to 'target/linux/generic/backport-5.15/775-v6.0-03-net-ethernet-stmicro-stmmac-move-dma-conf-to-dedicat.patch')
-rw-r--r-- | target/linux/generic/backport-5.15/775-v6.0-03-net-ethernet-stmicro-stmmac-move-dma-conf-to-dedicat.patch | 1289 |
1 files changed, 1289 insertions, 0 deletions
diff --git a/target/linux/generic/backport-5.15/775-v6.0-03-net-ethernet-stmicro-stmmac-move-dma-conf-to-dedicat.patch b/target/linux/generic/backport-5.15/775-v6.0-03-net-ethernet-stmicro-stmmac-move-dma-conf-to-dedicat.patch new file mode 100644 index 0000000000..5cb2663c82 --- /dev/null +++ b/target/linux/generic/backport-5.15/775-v6.0-03-net-ethernet-stmicro-stmmac-move-dma-conf-to-dedicat.patch @@ -0,0 +1,1289 @@ +From 8531c80800c10e8ef7952022326c2f983e1314bf Mon Sep 17 00:00:00 2001 +From: Christian Marangi <ansuelsmth@gmail.com> +Date: Sat, 23 Jul 2022 16:29:31 +0200 +Subject: [PATCH 3/5] net: ethernet: stmicro: stmmac: move dma conf to + dedicated struct + +Move dma buf conf to dedicated struct. This in preparation for code +rework that will permit to allocate separate dma_conf without affecting +the priv struct. + +Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> +Signed-off-by: Jakub Kicinski <kuba@kernel.org> +--- + .../net/ethernet/stmicro/stmmac/chain_mode.c | 6 +- + .../net/ethernet/stmicro/stmmac/ring_mode.c | 4 +- + drivers/net/ethernet/stmicro/stmmac/stmmac.h | 21 +- + .../ethernet/stmicro/stmmac/stmmac_ethtool.c | 4 +- + .../net/ethernet/stmicro/stmmac/stmmac_main.c | 286 +++++++++--------- + .../stmicro/stmmac/stmmac_selftests.c | 8 +- + .../net/ethernet/stmicro/stmmac/stmmac_tc.c | 6 +- + 7 files changed, 172 insertions(+), 163 deletions(-) + +--- a/drivers/net/ethernet/stmicro/stmmac/chain_mode.c ++++ b/drivers/net/ethernet/stmicro/stmmac/chain_mode.c +@@ -46,7 +46,7 @@ static int jumbo_frm(void *p, struct sk_ + + while (len != 0) { + tx_q->tx_skbuff[entry] = NULL; +- entry = STMMAC_GET_ENTRY(entry, priv->dma_tx_size); ++ entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_tx_size); + desc = tx_q->dma_tx + entry; + + if (len > bmax) { +@@ -137,7 +137,7 @@ static void refill_desc3(void *priv_ptr, + */ + p->des3 = cpu_to_le32((unsigned int)(rx_q->dma_rx_phy + + (((rx_q->dirty_rx) + 1) % +- priv->dma_rx_size) * ++ priv->dma_conf.dma_rx_size) * + sizeof(struct dma_desc))); + } + +@@ -155,7 +155,7 @@ static void clean_desc3(void *priv_ptr, + */ + p->des3 = cpu_to_le32((unsigned int)((tx_q->dma_tx_phy + + ((tx_q->dirty_tx + 1) % +- priv->dma_tx_size)) ++ priv->dma_conf.dma_tx_size)) + * sizeof(struct dma_desc))); + } + +--- a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c ++++ b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c +@@ -51,7 +51,7 @@ static int jumbo_frm(void *p, struct sk_ + stmmac_prepare_tx_desc(priv, desc, 1, bmax, csum, + STMMAC_RING_MODE, 0, false, skb->len); + tx_q->tx_skbuff[entry] = NULL; +- entry = STMMAC_GET_ENTRY(entry, priv->dma_tx_size); ++ entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_tx_size); + + if (priv->extend_desc) + desc = (struct dma_desc *)(tx_q->dma_etx + entry); +@@ -107,7 +107,7 @@ static void refill_desc3(void *priv_ptr, + struct stmmac_priv *priv = rx_q->priv_data; + + /* Fill DES3 in case of RING mode */ +- if (priv->dma_buf_sz == BUF_SIZE_16KiB) ++ if (priv->dma_conf.dma_buf_sz == BUF_SIZE_16KiB) + p->des3 = cpu_to_le32(le32_to_cpu(p->des2) + BUF_SIZE_8KiB); + } + +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h +@@ -185,6 +185,18 @@ struct stmmac_rfs_entry { + int tc; + }; + ++struct stmmac_dma_conf { ++ unsigned int dma_buf_sz; ++ ++ /* RX Queue */ ++ struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; ++ unsigned int dma_rx_size; ++ ++ /* TX Queue */ ++ struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; ++ unsigned int dma_tx_size; ++}; ++ + struct stmmac_priv { + /* Frequently used values are kept adjacent for cache effect */ + u32 tx_coal_frames[MTL_MAX_TX_QUEUES]; +@@ -199,7 +211,6 @@ struct stmmac_priv { + int sph_cap; + u32 sarc_type; + +- unsigned int dma_buf_sz; + unsigned int rx_copybreak; + u32 rx_riwt[MTL_MAX_TX_QUEUES]; + int hwts_rx_en; +@@ -211,13 +222,7 @@ struct stmmac_priv { + int (*hwif_quirks)(struct stmmac_priv *priv); + struct mutex lock; + +- /* RX Queue */ +- struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; +- unsigned int dma_rx_size; +- +- /* TX Queue */ +- struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; +- unsigned int dma_tx_size; ++ struct stmmac_dma_conf dma_conf; + + /* Generic channel for NAPI */ + struct stmmac_channel channel[STMMAC_CH_MAX]; +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +@@ -484,8 +484,8 @@ static void stmmac_get_ringparam(struct + + ring->rx_max_pending = DMA_MAX_RX_SIZE; + ring->tx_max_pending = DMA_MAX_TX_SIZE; +- ring->rx_pending = priv->dma_rx_size; +- ring->tx_pending = priv->dma_tx_size; ++ ring->rx_pending = priv->dma_conf.dma_rx_size; ++ ring->tx_pending = priv->dma_conf.dma_tx_size; + } + + static int stmmac_set_ringparam(struct net_device *netdev, +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +@@ -74,8 +74,8 @@ static int phyaddr = -1; + module_param(phyaddr, int, 0444); + MODULE_PARM_DESC(phyaddr, "Physical device address"); + +-#define STMMAC_TX_THRESH(x) ((x)->dma_tx_size / 4) +-#define STMMAC_RX_THRESH(x) ((x)->dma_rx_size / 4) ++#define STMMAC_TX_THRESH(x) ((x)->dma_conf.dma_tx_size / 4) ++#define STMMAC_RX_THRESH(x) ((x)->dma_conf.dma_rx_size / 4) + + /* Limit to make sure XDP TX and slow path can coexist */ + #define STMMAC_XSK_TX_BUDGET_MAX 256 +@@ -232,7 +232,7 @@ static void stmmac_disable_all_queues(st + + /* synchronize_rcu() needed for pending XDP buffers to drain */ + for (queue = 0; queue < rx_queues_cnt; queue++) { +- rx_q = &priv->rx_queue[queue]; ++ rx_q = &priv->dma_conf.rx_queue[queue]; + if (rx_q->xsk_pool) { + synchronize_rcu(); + break; +@@ -358,13 +358,13 @@ static void print_pkt(unsigned char *buf + + static inline u32 stmmac_tx_avail(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + u32 avail; + + if (tx_q->dirty_tx > tx_q->cur_tx) + avail = tx_q->dirty_tx - tx_q->cur_tx - 1; + else +- avail = priv->dma_tx_size - tx_q->cur_tx + tx_q->dirty_tx - 1; ++ avail = priv->dma_conf.dma_tx_size - tx_q->cur_tx + tx_q->dirty_tx - 1; + + return avail; + } +@@ -376,13 +376,13 @@ static inline u32 stmmac_tx_avail(struct + */ + static inline u32 stmmac_rx_dirty(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + u32 dirty; + + if (rx_q->dirty_rx <= rx_q->cur_rx) + dirty = rx_q->cur_rx - rx_q->dirty_rx; + else +- dirty = priv->dma_rx_size - rx_q->dirty_rx + rx_q->cur_rx; ++ dirty = priv->dma_conf.dma_rx_size - rx_q->dirty_rx + rx_q->cur_rx; + + return dirty; + } +@@ -410,7 +410,7 @@ static int stmmac_enable_eee_mode(struct + + /* check if all TX queues have the work finished */ + for (queue = 0; queue < tx_cnt; queue++) { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + + if (tx_q->dirty_tx != tx_q->cur_tx) + return -EBUSY; /* still unfinished work */ +@@ -1293,7 +1293,7 @@ static void stmmac_display_rx_rings(stru + + /* Display RX rings */ + for (queue = 0; queue < rx_cnt; queue++) { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + + pr_info("\tRX Queue %u rings\n", queue); + +@@ -1306,7 +1306,7 @@ static void stmmac_display_rx_rings(stru + } + + /* Display RX ring */ +- stmmac_display_ring(priv, head_rx, priv->dma_rx_size, true, ++ stmmac_display_ring(priv, head_rx, priv->dma_conf.dma_rx_size, true, + rx_q->dma_rx_phy, desc_size); + } + } +@@ -1320,7 +1320,7 @@ static void stmmac_display_tx_rings(stru + + /* Display TX rings */ + for (queue = 0; queue < tx_cnt; queue++) { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + + pr_info("\tTX Queue %d rings\n", queue); + +@@ -1335,7 +1335,7 @@ static void stmmac_display_tx_rings(stru + desc_size = sizeof(struct dma_desc); + } + +- stmmac_display_ring(priv, head_tx, priv->dma_tx_size, false, ++ stmmac_display_ring(priv, head_tx, priv->dma_conf.dma_tx_size, false, + tx_q->dma_tx_phy, desc_size); + } + } +@@ -1376,21 +1376,21 @@ static int stmmac_set_bfsize(int mtu, in + */ + static void stmmac_clear_rx_descriptors(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + int i; + + /* Clear the RX descriptors */ +- for (i = 0; i < priv->dma_rx_size; i++) ++ for (i = 0; i < priv->dma_conf.dma_rx_size; i++) + if (priv->extend_desc) + stmmac_init_rx_desc(priv, &rx_q->dma_erx[i].basic, + priv->use_riwt, priv->mode, +- (i == priv->dma_rx_size - 1), +- priv->dma_buf_sz); ++ (i == priv->dma_conf.dma_rx_size - 1), ++ priv->dma_conf.dma_buf_sz); + else + stmmac_init_rx_desc(priv, &rx_q->dma_rx[i], + priv->use_riwt, priv->mode, +- (i == priv->dma_rx_size - 1), +- priv->dma_buf_sz); ++ (i == priv->dma_conf.dma_rx_size - 1), ++ priv->dma_conf.dma_buf_sz); + } + + /** +@@ -1402,12 +1402,12 @@ static void stmmac_clear_rx_descriptors( + */ + static void stmmac_clear_tx_descriptors(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + int i; + + /* Clear the TX descriptors */ +- for (i = 0; i < priv->dma_tx_size; i++) { +- int last = (i == (priv->dma_tx_size - 1)); ++ for (i = 0; i < priv->dma_conf.dma_tx_size; i++) { ++ int last = (i == (priv->dma_conf.dma_tx_size - 1)); + struct dma_desc *p; + + if (priv->extend_desc) +@@ -1455,7 +1455,7 @@ static void stmmac_clear_descriptors(str + static int stmmac_init_rx_buffers(struct stmmac_priv *priv, struct dma_desc *p, + int i, gfp_t flags, u32 queue) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + struct stmmac_rx_buffer *buf = &rx_q->buf_pool[i]; + + if (!buf->page) { +@@ -1480,7 +1480,7 @@ static int stmmac_init_rx_buffers(struct + buf->addr = page_pool_get_dma_addr(buf->page) + buf->page_offset; + + stmmac_set_desc_addr(priv, p, buf->addr); +- if (priv->dma_buf_sz == BUF_SIZE_16KiB) ++ if (priv->dma_conf.dma_buf_sz == BUF_SIZE_16KiB) + stmmac_init_desc3(priv, p); + + return 0; +@@ -1494,7 +1494,7 @@ static int stmmac_init_rx_buffers(struct + */ + static void stmmac_free_rx_buffer(struct stmmac_priv *priv, u32 queue, int i) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + struct stmmac_rx_buffer *buf = &rx_q->buf_pool[i]; + + if (buf->page) +@@ -1514,7 +1514,7 @@ static void stmmac_free_rx_buffer(struct + */ + static void stmmac_free_tx_buffer(struct stmmac_priv *priv, u32 queue, int i) + { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + + if (tx_q->tx_skbuff_dma[i].buf && + tx_q->tx_skbuff_dma[i].buf_type != STMMAC_TXBUF_T_XDP_TX) { +@@ -1559,17 +1559,17 @@ static void dma_free_rx_skbufs(struct st + { + int i; + +- for (i = 0; i < priv->dma_rx_size; i++) ++ for (i = 0; i < priv->dma_conf.dma_rx_size; i++) + stmmac_free_rx_buffer(priv, queue, i); + } + + static int stmmac_alloc_rx_buffers(struct stmmac_priv *priv, u32 queue, + gfp_t flags) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + int i; + +- for (i = 0; i < priv->dma_rx_size; i++) { ++ for (i = 0; i < priv->dma_conf.dma_rx_size; i++) { + struct dma_desc *p; + int ret; + +@@ -1596,10 +1596,10 @@ static int stmmac_alloc_rx_buffers(struc + */ + static void dma_free_rx_xskbufs(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + int i; + +- for (i = 0; i < priv->dma_rx_size; i++) { ++ for (i = 0; i < priv->dma_conf.dma_rx_size; i++) { + struct stmmac_rx_buffer *buf = &rx_q->buf_pool[i]; + + if (!buf->xdp) +@@ -1612,10 +1612,10 @@ static void dma_free_rx_xskbufs(struct s + + static int stmmac_alloc_rx_buffers_zc(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + int i; + +- for (i = 0; i < priv->dma_rx_size; i++) { ++ for (i = 0; i < priv->dma_conf.dma_rx_size; i++) { + struct stmmac_rx_buffer *buf; + dma_addr_t dma_addr; + struct dma_desc *p; +@@ -1658,7 +1658,7 @@ static struct xsk_buff_pool *stmmac_get_ + */ + static int __init_dma_rx_desc_rings(struct stmmac_priv *priv, u32 queue, gfp_t flags) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + int ret; + + netif_dbg(priv, probe, priv->dev, +@@ -1704,11 +1704,11 @@ static int __init_dma_rx_desc_rings(stru + if (priv->extend_desc) + stmmac_mode_init(priv, rx_q->dma_erx, + rx_q->dma_rx_phy, +- priv->dma_rx_size, 1); ++ priv->dma_conf.dma_rx_size, 1); + else + stmmac_mode_init(priv, rx_q->dma_rx, + rx_q->dma_rx_phy, +- priv->dma_rx_size, 0); ++ priv->dma_conf.dma_rx_size, 0); + } + + return 0; +@@ -1735,7 +1735,7 @@ static int init_dma_rx_desc_rings(struct + + err_init_rx_buffers: + while (queue >= 0) { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + + if (rx_q->xsk_pool) + dma_free_rx_xskbufs(priv, queue); +@@ -1764,7 +1764,7 @@ err_init_rx_buffers: + */ + static int __init_dma_tx_desc_rings(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + int i; + + netif_dbg(priv, probe, priv->dev, +@@ -1776,16 +1776,16 @@ static int __init_dma_tx_desc_rings(stru + if (priv->extend_desc) + stmmac_mode_init(priv, tx_q->dma_etx, + tx_q->dma_tx_phy, +- priv->dma_tx_size, 1); ++ priv->dma_conf.dma_tx_size, 1); + else if (!(tx_q->tbs & STMMAC_TBS_AVAIL)) + stmmac_mode_init(priv, tx_q->dma_tx, + tx_q->dma_tx_phy, +- priv->dma_tx_size, 0); ++ priv->dma_conf.dma_tx_size, 0); + } + + tx_q->xsk_pool = stmmac_get_xsk_pool(priv, queue); + +- for (i = 0; i < priv->dma_tx_size; i++) { ++ for (i = 0; i < priv->dma_conf.dma_tx_size; i++) { + struct dma_desc *p; + + if (priv->extend_desc) +@@ -1855,12 +1855,12 @@ static int init_dma_desc_rings(struct ne + */ + static void dma_free_tx_skbufs(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + int i; + + tx_q->xsk_frames_done = 0; + +- for (i = 0; i < priv->dma_tx_size; i++) ++ for (i = 0; i < priv->dma_conf.dma_tx_size; i++) + stmmac_free_tx_buffer(priv, queue, i); + + if (tx_q->xsk_pool && tx_q->xsk_frames_done) { +@@ -1890,7 +1890,7 @@ static void stmmac_free_tx_skbufs(struct + */ + static void __free_dma_rx_desc_resources(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + + /* Release the DMA RX socket buffers */ + if (rx_q->xsk_pool) +@@ -1903,11 +1903,11 @@ static void __free_dma_rx_desc_resources + + /* Free DMA regions of consistent memory previously allocated */ + if (!priv->extend_desc) +- dma_free_coherent(priv->device, priv->dma_rx_size * ++ dma_free_coherent(priv->device, priv->dma_conf.dma_rx_size * + sizeof(struct dma_desc), + rx_q->dma_rx, rx_q->dma_rx_phy); + else +- dma_free_coherent(priv->device, priv->dma_rx_size * ++ dma_free_coherent(priv->device, priv->dma_conf.dma_rx_size * + sizeof(struct dma_extended_desc), + rx_q->dma_erx, rx_q->dma_rx_phy); + +@@ -1936,7 +1936,7 @@ static void free_dma_rx_desc_resources(s + */ + static void __free_dma_tx_desc_resources(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + size_t size; + void *addr; + +@@ -1954,7 +1954,7 @@ static void __free_dma_tx_desc_resources + addr = tx_q->dma_tx; + } + +- size *= priv->dma_tx_size; ++ size *= priv->dma_conf.dma_tx_size; + + dma_free_coherent(priv->device, size, addr, tx_q->dma_tx_phy); + +@@ -1983,7 +1983,7 @@ static void free_dma_tx_desc_resources(s + */ + static int __alloc_dma_rx_desc_resources(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + struct stmmac_channel *ch = &priv->channel[queue]; + bool xdp_prog = stmmac_xdp_is_enabled(priv); + struct page_pool_params pp_params = { 0 }; +@@ -1995,8 +1995,8 @@ static int __alloc_dma_rx_desc_resources + rx_q->priv_data = priv; + + pp_params.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV; +- pp_params.pool_size = priv->dma_rx_size; +- num_pages = DIV_ROUND_UP(priv->dma_buf_sz, PAGE_SIZE); ++ pp_params.pool_size = priv->dma_conf.dma_rx_size; ++ num_pages = DIV_ROUND_UP(priv->dma_conf.dma_buf_sz, PAGE_SIZE); + pp_params.order = ilog2(num_pages); + pp_params.nid = dev_to_node(priv->device); + pp_params.dev = priv->device; +@@ -2011,7 +2011,7 @@ static int __alloc_dma_rx_desc_resources + return ret; + } + +- rx_q->buf_pool = kcalloc(priv->dma_rx_size, ++ rx_q->buf_pool = kcalloc(priv->dma_conf.dma_rx_size, + sizeof(*rx_q->buf_pool), + GFP_KERNEL); + if (!rx_q->buf_pool) +@@ -2019,7 +2019,7 @@ static int __alloc_dma_rx_desc_resources + + if (priv->extend_desc) { + rx_q->dma_erx = dma_alloc_coherent(priv->device, +- priv->dma_rx_size * ++ priv->dma_conf.dma_rx_size * + sizeof(struct dma_extended_desc), + &rx_q->dma_rx_phy, + GFP_KERNEL); +@@ -2028,7 +2028,7 @@ static int __alloc_dma_rx_desc_resources + + } else { + rx_q->dma_rx = dma_alloc_coherent(priv->device, +- priv->dma_rx_size * ++ priv->dma_conf.dma_rx_size * + sizeof(struct dma_desc), + &rx_q->dma_rx_phy, + GFP_KERNEL); +@@ -2085,20 +2085,20 @@ err_dma: + */ + static int __alloc_dma_tx_desc_resources(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + size_t size; + void *addr; + + tx_q->queue_index = queue; + tx_q->priv_data = priv; + +- tx_q->tx_skbuff_dma = kcalloc(priv->dma_tx_size, ++ tx_q->tx_skbuff_dma = kcalloc(priv->dma_conf.dma_tx_size, + sizeof(*tx_q->tx_skbuff_dma), + GFP_KERNEL); + if (!tx_q->tx_skbuff_dma) + return -ENOMEM; + +- tx_q->tx_skbuff = kcalloc(priv->dma_tx_size, ++ tx_q->tx_skbuff = kcalloc(priv->dma_conf.dma_tx_size, + sizeof(struct sk_buff *), + GFP_KERNEL); + if (!tx_q->tx_skbuff) +@@ -2111,7 +2111,7 @@ static int __alloc_dma_tx_desc_resources + else + size = sizeof(struct dma_desc); + +- size *= priv->dma_tx_size; ++ size *= priv->dma_conf.dma_tx_size; + + addr = dma_alloc_coherent(priv->device, size, + &tx_q->dma_tx_phy, GFP_KERNEL); +@@ -2355,7 +2355,7 @@ static void stmmac_dma_operation_mode(st + + /* configure all channels */ + for (chan = 0; chan < rx_channels_count; chan++) { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[chan]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[chan]; + u32 buf_size; + + qmode = priv->plat->rx_queues_cfg[chan].mode_to_use; +@@ -2370,7 +2370,7 @@ static void stmmac_dma_operation_mode(st + chan); + } else { + stmmac_set_dma_bfsize(priv, priv->ioaddr, +- priv->dma_buf_sz, ++ priv->dma_conf.dma_buf_sz, + chan); + } + } +@@ -2386,7 +2386,7 @@ static void stmmac_dma_operation_mode(st + static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget) + { + struct netdev_queue *nq = netdev_get_tx_queue(priv->dev, queue); +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + struct xsk_buff_pool *pool = tx_q->xsk_pool; + unsigned int entry = tx_q->cur_tx; + struct dma_desc *tx_desc = NULL; +@@ -2461,7 +2461,7 @@ static bool stmmac_xdp_xmit_zc(struct st + + stmmac_enable_dma_transmission(priv, priv->ioaddr); + +- tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_tx_size); ++ tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_conf.dma_tx_size); + entry = tx_q->cur_tx; + } + +@@ -2487,7 +2487,7 @@ static bool stmmac_xdp_xmit_zc(struct st + */ + static int stmmac_tx_clean(struct stmmac_priv *priv, int budget, u32 queue) + { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + unsigned int bytes_compl = 0, pkts_compl = 0; + unsigned int entry, xmits = 0, count = 0; + +@@ -2500,7 +2500,7 @@ static int stmmac_tx_clean(struct stmmac + entry = tx_q->dirty_tx; + + /* Try to clean all TX complete frame in 1 shot */ +- while ((entry != tx_q->cur_tx) && count < priv->dma_tx_size) { ++ while ((entry != tx_q->cur_tx) && count < priv->dma_conf.dma_tx_size) { + struct xdp_frame *xdpf; + struct sk_buff *skb; + struct dma_desc *p; +@@ -2600,7 +2600,7 @@ static int stmmac_tx_clean(struct stmmac + + stmmac_release_tx_desc(priv, p, priv->mode); + +- entry = STMMAC_GET_ENTRY(entry, priv->dma_tx_size); ++ entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_tx_size); + } + tx_q->dirty_tx = entry; + +@@ -2665,7 +2665,7 @@ static int stmmac_tx_clean(struct stmmac + */ + static void stmmac_tx_err(struct stmmac_priv *priv, u32 chan) + { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan]; + + netif_tx_stop_queue(netdev_get_tx_queue(priv->dev, chan)); + +@@ -2732,8 +2732,8 @@ static int stmmac_napi_check(struct stmm + { + int status = stmmac_dma_interrupt_status(priv, priv->ioaddr, + &priv->xstats, chan, dir); +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[chan]; +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[chan]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan]; + struct stmmac_channel *ch = &priv->channel[chan]; + struct napi_struct *rx_napi; + struct napi_struct *tx_napi; +@@ -2909,7 +2909,7 @@ static int stmmac_init_dma_engine(struct + + /* DMA RX Channel Configuration */ + for (chan = 0; chan < rx_channels_count; chan++) { +- rx_q = &priv->rx_queue[chan]; ++ rx_q = &priv->dma_conf.rx_queue[chan]; + + stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg, + rx_q->dma_rx_phy, chan); +@@ -2923,7 +2923,7 @@ static int stmmac_init_dma_engine(struct + + /* DMA TX Channel Configuration */ + for (chan = 0; chan < tx_channels_count; chan++) { +- tx_q = &priv->tx_queue[chan]; ++ tx_q = &priv->dma_conf.tx_queue[chan]; + + stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg, + tx_q->dma_tx_phy, chan); +@@ -2938,7 +2938,7 @@ static int stmmac_init_dma_engine(struct + + static void stmmac_tx_timer_arm(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + + hrtimer_start(&tx_q->txtimer, + STMMAC_COAL_TIMER(priv->tx_coal_timer[queue]), +@@ -2988,7 +2988,7 @@ static void stmmac_init_coalesce(struct + u32 chan; + + for (chan = 0; chan < tx_channel_count; chan++) { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan]; + + priv->tx_coal_frames[chan] = STMMAC_TX_FRAMES; + priv->tx_coal_timer[chan] = STMMAC_COAL_TX_TIMER; +@@ -3010,12 +3010,12 @@ static void stmmac_set_rings_length(stru + /* set TX ring length */ + for (chan = 0; chan < tx_channels_count; chan++) + stmmac_set_tx_ring_len(priv, priv->ioaddr, +- (priv->dma_tx_size - 1), chan); ++ (priv->dma_conf.dma_tx_size - 1), chan); + + /* set RX ring length */ + for (chan = 0; chan < rx_channels_count; chan++) + stmmac_set_rx_ring_len(priv, priv->ioaddr, +- (priv->dma_rx_size - 1), chan); ++ (priv->dma_conf.dma_rx_size - 1), chan); + } + + /** +@@ -3350,7 +3350,7 @@ static int stmmac_hw_setup(struct net_de + /* Enable TSO */ + if (priv->tso) { + for (chan = 0; chan < tx_cnt; chan++) { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan]; + + /* TSO and TBS cannot co-exist */ + if (tx_q->tbs & STMMAC_TBS_AVAIL) +@@ -3372,7 +3372,7 @@ static int stmmac_hw_setup(struct net_de + + /* TBS */ + for (chan = 0; chan < tx_cnt; chan++) { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan]; + int enable = tx_q->tbs & STMMAC_TBS_AVAIL; + + stmmac_enable_tbs(priv, priv->ioaddr, enable, chan); +@@ -3416,7 +3416,7 @@ static void stmmac_free_irq(struct net_d + for (j = irq_idx - 1; j >= 0; j--) { + if (priv->tx_irq[j] > 0) { + irq_set_affinity_hint(priv->tx_irq[j], NULL); +- free_irq(priv->tx_irq[j], &priv->tx_queue[j]); ++ free_irq(priv->tx_irq[j], &priv->dma_conf.tx_queue[j]); + } + } + irq_idx = priv->plat->rx_queues_to_use; +@@ -3425,7 +3425,7 @@ static void stmmac_free_irq(struct net_d + for (j = irq_idx - 1; j >= 0; j--) { + if (priv->rx_irq[j] > 0) { + irq_set_affinity_hint(priv->rx_irq[j], NULL); +- free_irq(priv->rx_irq[j], &priv->rx_queue[j]); ++ free_irq(priv->rx_irq[j], &priv->dma_conf.rx_queue[j]); + } + } + +@@ -3558,7 +3558,7 @@ static int stmmac_request_irq_multi_msi( + sprintf(int_name, "%s:%s-%d", dev->name, "rx", i); + ret = request_irq(priv->rx_irq[i], + stmmac_msi_intr_rx, +- 0, int_name, &priv->rx_queue[i]); ++ 0, int_name, &priv->dma_conf.rx_queue[i]); + if (unlikely(ret < 0)) { + netdev_err(priv->dev, + "%s: alloc rx-%d MSI %d (error: %d)\n", +@@ -3581,7 +3581,7 @@ static int stmmac_request_irq_multi_msi( + sprintf(int_name, "%s:%s-%d", dev->name, "tx", i); + ret = request_irq(priv->tx_irq[i], + stmmac_msi_intr_tx, +- 0, int_name, &priv->tx_queue[i]); ++ 0, int_name, &priv->dma_conf.tx_queue[i]); + if (unlikely(ret < 0)) { + netdev_err(priv->dev, + "%s: alloc tx-%d MSI %d (error: %d)\n", +@@ -3712,21 +3712,21 @@ static int stmmac_open(struct net_device + bfsize = 0; + + if (bfsize < BUF_SIZE_16KiB) +- bfsize = stmmac_set_bfsize(dev->mtu, priv->dma_buf_sz); ++ bfsize = stmmac_set_bfsize(dev->mtu, priv->dma_conf.dma_buf_sz); + +- priv->dma_buf_sz = bfsize; ++ priv->dma_conf.dma_buf_sz = bfsize; + buf_sz = bfsize; + + priv->rx_copybreak = STMMAC_RX_COPYBREAK; + +- if (!priv->dma_tx_size) +- priv->dma_tx_size = DMA_DEFAULT_TX_SIZE; +- if (!priv->dma_rx_size) +- priv->dma_rx_size = DMA_DEFAULT_RX_SIZE; ++ if (!priv->dma_conf.dma_tx_size) ++ priv->dma_conf.dma_tx_size = DMA_DEFAULT_TX_SIZE; ++ if (!priv->dma_conf.dma_rx_size) ++ priv->dma_conf.dma_rx_size = DMA_DEFAULT_RX_SIZE; + + /* Earlier check for TBS */ + for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++) { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan]; + int tbs_en = priv->plat->tx_queues_cfg[chan].tbs_en; + + /* Setup per-TXQ tbs flag before TX descriptor alloc */ +@@ -3775,7 +3775,7 @@ irq_error: + phylink_stop(priv->phylink); + + for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++) +- hrtimer_cancel(&priv->tx_queue[chan].txtimer); ++ hrtimer_cancel(&priv->dma_conf.tx_queue[chan].txtimer); + + stmmac_hw_teardown(dev); + init_error: +@@ -3817,7 +3817,7 @@ static int stmmac_release(struct net_dev + stmmac_disable_all_queues(priv); + + for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++) +- hrtimer_cancel(&priv->tx_queue[chan].txtimer); ++ hrtimer_cancel(&priv->dma_conf.tx_queue[chan].txtimer); + + netif_tx_disable(dev); + +@@ -3877,7 +3877,7 @@ static bool stmmac_vlan_insert(struct st + return false; + + stmmac_set_tx_owner(priv, p); +- tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_tx_size); ++ tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_conf.dma_tx_size); + return true; + } + +@@ -3895,7 +3895,7 @@ static bool stmmac_vlan_insert(struct st + static void stmmac_tso_allocator(struct stmmac_priv *priv, dma_addr_t des, + int total_len, bool last_segment, u32 queue) + { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + struct dma_desc *desc; + u32 buff_size; + int tmp_len; +@@ -3906,7 +3906,7 @@ static void stmmac_tso_allocator(struct + dma_addr_t curr_addr; + + tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, +- priv->dma_tx_size); ++ priv->dma_conf.dma_tx_size); + WARN_ON(tx_q->tx_skbuff[tx_q->cur_tx]); + + if (tx_q->tbs & STMMAC_TBS_AVAIL) +@@ -3934,7 +3934,7 @@ static void stmmac_tso_allocator(struct + + static void stmmac_flush_tx_descriptors(struct stmmac_priv *priv, int queue) + { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + int desc_size; + + if (likely(priv->extend_desc)) +@@ -3996,7 +3996,7 @@ static netdev_tx_t stmmac_tso_xmit(struc + dma_addr_t des; + int i; + +- tx_q = &priv->tx_queue[queue]; ++ tx_q = &priv->dma_conf.tx_queue[queue]; + first_tx = tx_q->cur_tx; + + /* Compute header lengths */ +@@ -4036,7 +4036,7 @@ static netdev_tx_t stmmac_tso_xmit(struc + stmmac_set_mss(priv, mss_desc, mss); + tx_q->mss = mss; + tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, +- priv->dma_tx_size); ++ priv->dma_conf.dma_tx_size); + WARN_ON(tx_q->tx_skbuff[tx_q->cur_tx]); + } + +@@ -4148,7 +4148,7 @@ static netdev_tx_t stmmac_tso_xmit(struc + * ndo_start_xmit will fill this descriptor the next time it's + * called and stmmac_tx_clean may clean up to this descriptor. + */ +- tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_tx_size); ++ tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_conf.dma_tx_size); + + if (unlikely(stmmac_tx_avail(priv, queue) <= (MAX_SKB_FRAGS + 1))) { + netif_dbg(priv, hw, priv->dev, "%s: stop transmitted packets\n", +@@ -4236,7 +4236,7 @@ static netdev_tx_t stmmac_xmit(struct sk + int entry, first_tx; + dma_addr_t des; + +- tx_q = &priv->tx_queue[queue]; ++ tx_q = &priv->dma_conf.tx_queue[queue]; + first_tx = tx_q->cur_tx; + + if (priv->tx_path_in_lpi_mode && priv->eee_sw_timer_en) +@@ -4299,7 +4299,7 @@ static netdev_tx_t stmmac_xmit(struct sk + int len = skb_frag_size(frag); + bool last_segment = (i == (nfrags - 1)); + +- entry = STMMAC_GET_ENTRY(entry, priv->dma_tx_size); ++ entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_tx_size); + WARN_ON(tx_q->tx_skbuff[entry]); + + if (likely(priv->extend_desc)) +@@ -4370,7 +4370,7 @@ static netdev_tx_t stmmac_xmit(struct sk + * ndo_start_xmit will fill this descriptor the next time it's + * called and stmmac_tx_clean may clean up to this descriptor. + */ +- entry = STMMAC_GET_ENTRY(entry, priv->dma_tx_size); ++ entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_tx_size); + tx_q->cur_tx = entry; + + if (netif_msg_pktdata(priv)) { +@@ -4485,7 +4485,7 @@ static void stmmac_rx_vlan(struct net_de + */ + static inline void stmmac_rx_refill(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + int dirty = stmmac_rx_dirty(priv, queue); + unsigned int entry = rx_q->dirty_rx; + +@@ -4535,7 +4535,7 @@ static inline void stmmac_rx_refill(stru + dma_wmb(); + stmmac_set_rx_owner(priv, p, use_rx_wd); + +- entry = STMMAC_GET_ENTRY(entry, priv->dma_rx_size); ++ entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_rx_size); + } + rx_q->dirty_rx = entry; + rx_q->rx_tail_addr = rx_q->dma_rx_phy + +@@ -4563,12 +4563,12 @@ static unsigned int stmmac_rx_buf1_len(s + + /* First descriptor, not last descriptor and not split header */ + if (status & rx_not_ls) +- return priv->dma_buf_sz; ++ return priv->dma_conf.dma_buf_sz; + + plen = stmmac_get_rx_frame_len(priv, p, coe); + + /* First descriptor and last descriptor and not split header */ +- return min_t(unsigned int, priv->dma_buf_sz, plen); ++ return min_t(unsigned int, priv->dma_conf.dma_buf_sz, plen); + } + + static unsigned int stmmac_rx_buf2_len(struct stmmac_priv *priv, +@@ -4584,7 +4584,7 @@ static unsigned int stmmac_rx_buf2_len(s + + /* Not last descriptor */ + if (status & rx_not_ls) +- return priv->dma_buf_sz; ++ return priv->dma_conf.dma_buf_sz; + + plen = stmmac_get_rx_frame_len(priv, p, coe); + +@@ -4595,7 +4595,7 @@ static unsigned int stmmac_rx_buf2_len(s + static int stmmac_xdp_xmit_xdpf(struct stmmac_priv *priv, int queue, + struct xdp_frame *xdpf, bool dma_map) + { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + unsigned int entry = tx_q->cur_tx; + struct dma_desc *tx_desc; + dma_addr_t dma_addr; +@@ -4658,7 +4658,7 @@ static int stmmac_xdp_xmit_xdpf(struct s + + stmmac_enable_dma_transmission(priv, priv->ioaddr); + +- entry = STMMAC_GET_ENTRY(entry, priv->dma_tx_size); ++ entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_tx_size); + tx_q->cur_tx = entry; + + return STMMAC_XDP_TX; +@@ -4832,7 +4832,7 @@ static void stmmac_dispatch_skb_zc(struc + + static bool stmmac_rx_refill_zc(struct stmmac_priv *priv, u32 queue, u32 budget) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + unsigned int entry = rx_q->dirty_rx; + struct dma_desc *rx_desc = NULL; + bool ret = true; +@@ -4875,7 +4875,7 @@ static bool stmmac_rx_refill_zc(struct s + dma_wmb(); + stmmac_set_rx_owner(priv, rx_desc, use_rx_wd); + +- entry = STMMAC_GET_ENTRY(entry, priv->dma_rx_size); ++ entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_rx_size); + } + + if (rx_desc) { +@@ -4890,7 +4890,7 @@ static bool stmmac_rx_refill_zc(struct s + + static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + unsigned int count = 0, error = 0, len = 0; + int dirty = stmmac_rx_dirty(priv, queue); + unsigned int next_entry = rx_q->cur_rx; +@@ -4912,7 +4912,7 @@ static int stmmac_rx_zc(struct stmmac_pr + desc_size = sizeof(struct dma_desc); + } + +- stmmac_display_ring(priv, rx_head, priv->dma_rx_size, true, ++ stmmac_display_ring(priv, rx_head, priv->dma_conf.dma_rx_size, true, + rx_q->dma_rx_phy, desc_size); + } + while (count < limit) { +@@ -4959,7 +4959,7 @@ read_again: + + /* Prefetch the next RX descriptor */ + rx_q->cur_rx = STMMAC_GET_ENTRY(rx_q->cur_rx, +- priv->dma_rx_size); ++ priv->dma_conf.dma_rx_size); + next_entry = rx_q->cur_rx; + + if (priv->extend_desc) +@@ -5080,7 +5080,7 @@ read_again: + */ + static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + struct stmmac_channel *ch = &priv->channel[queue]; + unsigned int count = 0, error = 0, len = 0; + int status = 0, coe = priv->hw->rx_csum; +@@ -5093,7 +5093,7 @@ static int stmmac_rx(struct stmmac_priv + int buf_sz; + + dma_dir = page_pool_get_dma_dir(rx_q->page_pool); +- buf_sz = DIV_ROUND_UP(priv->dma_buf_sz, PAGE_SIZE) * PAGE_SIZE; ++ buf_sz = DIV_ROUND_UP(priv->dma_conf.dma_buf_sz, PAGE_SIZE) * PAGE_SIZE; + + if (netif_msg_rx_status(priv)) { + void *rx_head; +@@ -5107,7 +5107,7 @@ static int stmmac_rx(struct stmmac_priv + desc_size = sizeof(struct dma_desc); + } + +- stmmac_display_ring(priv, rx_head, priv->dma_rx_size, true, ++ stmmac_display_ring(priv, rx_head, priv->dma_conf.dma_rx_size, true, + rx_q->dma_rx_phy, desc_size); + } + while (count < limit) { +@@ -5151,7 +5151,7 @@ read_again: + break; + + rx_q->cur_rx = STMMAC_GET_ENTRY(rx_q->cur_rx, +- priv->dma_rx_size); ++ priv->dma_conf.dma_rx_size); + next_entry = rx_q->cur_rx; + + if (priv->extend_desc) +@@ -5285,7 +5285,7 @@ read_again: + buf1_len, dma_dir); + skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, + buf->page, buf->page_offset, buf1_len, +- priv->dma_buf_sz); ++ priv->dma_conf.dma_buf_sz); + + /* Data payload appended into SKB */ + page_pool_release_page(rx_q->page_pool, buf->page); +@@ -5297,7 +5297,7 @@ read_again: + buf2_len, dma_dir); + skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, + buf->sec_page, 0, buf2_len, +- priv->dma_buf_sz); ++ priv->dma_conf.dma_buf_sz); + + /* Data payload appended into SKB */ + page_pool_release_page(rx_q->page_pool, buf->sec_page); +@@ -5739,11 +5739,13 @@ static irqreturn_t stmmac_safety_interru + static irqreturn_t stmmac_msi_intr_tx(int irq, void *data) + { + struct stmmac_tx_queue *tx_q = (struct stmmac_tx_queue *)data; ++ struct stmmac_dma_conf *dma_conf; + int chan = tx_q->queue_index; + struct stmmac_priv *priv; + int status; + +- priv = container_of(tx_q, struct stmmac_priv, tx_queue[chan]); ++ dma_conf = container_of(tx_q, struct stmmac_dma_conf, tx_queue[chan]); ++ priv = container_of(dma_conf, struct stmmac_priv, dma_conf); + + if (unlikely(!data)) { + netdev_err(priv->dev, "%s: invalid dev pointer\n", __func__); +@@ -5783,10 +5785,12 @@ static irqreturn_t stmmac_msi_intr_tx(in + static irqreturn_t stmmac_msi_intr_rx(int irq, void *data) + { + struct stmmac_rx_queue *rx_q = (struct stmmac_rx_queue *)data; ++ struct stmmac_dma_conf *dma_conf; + int chan = rx_q->queue_index; + struct stmmac_priv *priv; + +- priv = container_of(rx_q, struct stmmac_priv, rx_queue[chan]); ++ dma_conf = container_of(rx_q, struct stmmac_dma_conf, rx_queue[chan]); ++ priv = container_of(dma_conf, struct stmmac_priv, dma_conf); + + if (unlikely(!data)) { + netdev_err(priv->dev, "%s: invalid dev pointer\n", __func__); +@@ -5817,10 +5821,10 @@ static void stmmac_poll_controller(struc + + if (priv->plat->multi_msi_en) { + for (i = 0; i < priv->plat->rx_queues_to_use; i++) +- stmmac_msi_intr_rx(0, &priv->rx_queue[i]); ++ stmmac_msi_intr_rx(0, &priv->dma_conf.rx_queue[i]); + + for (i = 0; i < priv->plat->tx_queues_to_use; i++) +- stmmac_msi_intr_tx(0, &priv->tx_queue[i]); ++ stmmac_msi_intr_tx(0, &priv->dma_conf.tx_queue[i]); + } else { + disable_irq(dev->irq); + stmmac_interrupt(dev->irq, dev); +@@ -6001,34 +6005,34 @@ static int stmmac_rings_status_show(stru + return 0; + + for (queue = 0; queue < rx_count; queue++) { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + + seq_printf(seq, "RX Queue %d:\n", queue); + + if (priv->extend_desc) { + seq_printf(seq, "Extended descriptor ring:\n"); + sysfs_display_ring((void *)rx_q->dma_erx, +- priv->dma_rx_size, 1, seq, rx_q->dma_rx_phy); ++ priv->dma_conf.dma_rx_size, 1, seq, rx_q->dma_rx_phy); + } else { + seq_printf(seq, "Descriptor ring:\n"); + sysfs_display_ring((void *)rx_q->dma_rx, +- priv->dma_rx_size, 0, seq, rx_q->dma_rx_phy); ++ priv->dma_conf.dma_rx_size, 0, seq, rx_q->dma_rx_phy); + } + } + + for (queue = 0; queue < tx_count; queue++) { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + + seq_printf(seq, "TX Queue %d:\n", queue); + + if (priv->extend_desc) { + seq_printf(seq, "Extended descriptor ring:\n"); + sysfs_display_ring((void *)tx_q->dma_etx, +- priv->dma_tx_size, 1, seq, tx_q->dma_tx_phy); ++ priv->dma_conf.dma_tx_size, 1, seq, tx_q->dma_tx_phy); + } else if (!(tx_q->tbs & STMMAC_TBS_AVAIL)) { + seq_printf(seq, "Descriptor ring:\n"); + sysfs_display_ring((void *)tx_q->dma_tx, +- priv->dma_tx_size, 0, seq, tx_q->dma_tx_phy); ++ priv->dma_conf.dma_tx_size, 0, seq, tx_q->dma_tx_phy); + } + } + +@@ -6369,7 +6373,7 @@ void stmmac_disable_rx_queue(struct stmm + + void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + struct stmmac_channel *ch = &priv->channel[queue]; + unsigned long flags; + u32 buf_size; +@@ -6406,7 +6410,7 @@ void stmmac_enable_rx_queue(struct stmma + rx_q->queue_index); + } else { + stmmac_set_dma_bfsize(priv, priv->ioaddr, +- priv->dma_buf_sz, ++ priv->dma_conf.dma_buf_sz, + rx_q->queue_index); + } + +@@ -6432,7 +6436,7 @@ void stmmac_disable_tx_queue(struct stmm + + void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + struct stmmac_channel *ch = &priv->channel[queue]; + unsigned long flags; + int ret; +@@ -6479,7 +6483,7 @@ void stmmac_xdp_release(struct net_devic + stmmac_disable_all_queues(priv); + + for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++) +- hrtimer_cancel(&priv->tx_queue[chan].txtimer); ++ hrtimer_cancel(&priv->dma_conf.tx_queue[chan].txtimer); + + /* Free the IRQ lines */ + stmmac_free_irq(dev, REQ_IRQ_ERR_ALL, 0); +@@ -6538,7 +6542,7 @@ int stmmac_xdp_open(struct net_device *d + + /* DMA RX Channel Configuration */ + for (chan = 0; chan < rx_cnt; chan++) { +- rx_q = &priv->rx_queue[chan]; ++ rx_q = &priv->dma_conf.rx_queue[chan]; + + stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg, + rx_q->dma_rx_phy, chan); +@@ -6556,7 +6560,7 @@ int stmmac_xdp_open(struct net_device *d + rx_q->queue_index); + } else { + stmmac_set_dma_bfsize(priv, priv->ioaddr, +- priv->dma_buf_sz, ++ priv->dma_conf.dma_buf_sz, + rx_q->queue_index); + } + +@@ -6565,7 +6569,7 @@ int stmmac_xdp_open(struct net_device *d + + /* DMA TX Channel Configuration */ + for (chan = 0; chan < tx_cnt; chan++) { +- tx_q = &priv->tx_queue[chan]; ++ tx_q = &priv->dma_conf.tx_queue[chan]; + + stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg, + tx_q->dma_tx_phy, chan); +@@ -6598,7 +6602,7 @@ int stmmac_xdp_open(struct net_device *d + + irq_error: + for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++) +- hrtimer_cancel(&priv->tx_queue[chan].txtimer); ++ hrtimer_cancel(&priv->dma_conf.tx_queue[chan].txtimer); + + stmmac_hw_teardown(dev); + init_error: +@@ -6625,8 +6629,8 @@ int stmmac_xsk_wakeup(struct net_device + queue >= priv->plat->tx_queues_to_use) + return -EINVAL; + +- rx_q = &priv->rx_queue[queue]; +- tx_q = &priv->tx_queue[queue]; ++ rx_q = &priv->dma_conf.rx_queue[queue]; ++ tx_q = &priv->dma_conf.tx_queue[queue]; + ch = &priv->channel[queue]; + + if (!rx_q->xsk_pool && !tx_q->xsk_pool) +@@ -6882,8 +6886,8 @@ int stmmac_reinit_ringparam(struct net_d + if (netif_running(dev)) + stmmac_release(dev); + +- priv->dma_rx_size = rx_size; +- priv->dma_tx_size = tx_size; ++ priv->dma_conf.dma_rx_size = rx_size; ++ priv->dma_conf.dma_tx_size = tx_size; + + if (netif_running(dev)) + ret = stmmac_open(dev); +@@ -7329,7 +7333,7 @@ int stmmac_suspend(struct device *dev) + stmmac_disable_all_queues(priv); + + for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++) +- hrtimer_cancel(&priv->tx_queue[chan].txtimer); ++ hrtimer_cancel(&priv->dma_conf.tx_queue[chan].txtimer); + + if (priv->eee_enabled) { + priv->tx_path_in_lpi_mode = false; +@@ -7380,7 +7384,7 @@ EXPORT_SYMBOL_GPL(stmmac_suspend); + + static void stmmac_reset_rx_queue(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; ++ struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue]; + + rx_q->cur_rx = 0; + rx_q->dirty_rx = 0; +@@ -7388,7 +7392,7 @@ static void stmmac_reset_rx_queue(struct + + static void stmmac_reset_tx_queue(struct stmmac_priv *priv, u32 queue) + { +- struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; ++ struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; + + tx_q->cur_tx = 0; + tx_q->dirty_tx = 0; +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c +@@ -795,8 +795,8 @@ static int stmmac_test_flowctrl(struct s + struct stmmac_channel *ch = &priv->channel[i]; + u32 tail; + +- tail = priv->rx_queue[i].dma_rx_phy + +- (priv->dma_rx_size * sizeof(struct dma_desc)); ++ tail = priv->dma_conf.rx_queue[i].dma_rx_phy + ++ (priv->dma_conf.dma_rx_size * sizeof(struct dma_desc)); + + stmmac_set_rx_tail_ptr(priv, priv->ioaddr, tail, i); + stmmac_start_rx(priv, priv->ioaddr, i); +@@ -1680,7 +1680,7 @@ cleanup: + static int __stmmac_test_jumbo(struct stmmac_priv *priv, u16 queue) + { + struct stmmac_packet_attrs attr = { }; +- int size = priv->dma_buf_sz; ++ int size = priv->dma_conf.dma_buf_sz; + + attr.dst = priv->dev->dev_addr; + attr.max_size = size - ETH_FCS_LEN; +@@ -1763,7 +1763,7 @@ static int stmmac_test_tbs(struct stmmac + + /* Find first TBS enabled Queue, if any */ + for (i = 0; i < priv->plat->tx_queues_to_use; i++) +- if (priv->tx_queue[i].tbs & STMMAC_TBS_AVAIL) ++ if (priv->dma_conf.tx_queue[i].tbs & STMMAC_TBS_AVAIL) + break; + + if (i >= priv->plat->tx_queues_to_use) +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c +@@ -970,13 +970,13 @@ static int tc_setup_etf(struct stmmac_pr + return -EOPNOTSUPP; + if (qopt->queue >= priv->plat->tx_queues_to_use) + return -EINVAL; +- if (!(priv->tx_queue[qopt->queue].tbs & STMMAC_TBS_AVAIL)) ++ if (!(priv->dma_conf.tx_queue[qopt->queue].tbs & STMMAC_TBS_AVAIL)) + return -EINVAL; + + if (qopt->enable) +- priv->tx_queue[qopt->queue].tbs |= STMMAC_TBS_EN; ++ priv->dma_conf.tx_queue[qopt->queue].tbs |= STMMAC_TBS_EN; + else +- priv->tx_queue[qopt->queue].tbs &= ~STMMAC_TBS_EN; ++ priv->dma_conf.tx_queue[qopt->queue].tbs &= ~STMMAC_TBS_EN; + + netdev_info(priv->dev, "%s ETF for Queue %d\n", + qopt->enable ? "enabled" : "disabled", qopt->queue); |