diff options
author | Felix Fietkau <nbd@nbd.name> | 2023-02-02 11:08:09 +0100 |
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committer | Felix Fietkau <nbd@nbd.name> | 2023-02-02 11:16:49 +0100 |
commit | 521efb62ebb55dcc67dc618757aa2e3ccbdf3774 (patch) | |
tree | 51969716df3fc0b26d30f1bdc28dd6e0e4d0e1e8 /target/linux/generic/backport-5.15/729-21-v6.3-net-ethernet-mtk_eth_soc-add-dma-checks-to-mtk_hw_re.patch | |
parent | 6f89a0ca20505e85f53bdd5573f26e443e961257 (diff) | |
download | upstream-521efb62ebb55dcc67dc618757aa2e3ccbdf3774.tar.gz upstream-521efb62ebb55dcc67dc618757aa2e3ccbdf3774.tar.bz2 upstream-521efb62ebb55dcc67dc618757aa2e3ccbdf3774.zip |
mt76: update to the latest version, import WED related mtk_eth_soc patches
6c256218e59e wifi: mt76: dma: use napi_build_skb
679254c50f27 mt7915: add CONFIG_MT76_LEDS to cflags
15b9dd6b1b6a wifi: mt76: mt7915: call mt7915_mcu_set_thermal_throttling() only after init_work
8e5c21fe7c5c wifi: mt76: mt7915: rework mt7915_mcu_set_thermal_throttling
87cb74fe42d9 wifi: mt76: mt7915: rework mt7915_thermal_temp_store()
c6f24b83eba5 wifi: mt76: mt7915: add error message in mt7915_thermal_set_cur_throttle_state()
99e96b89ee4d wifi: mt76: mt7915: add chip id condition in mt7915_check_eeprom()
833cd420480f wifi: mt76: mt7921: fix channel switch fail in monitor mode
f1f8bae6092d wifi: mt76: mt7921: add ack signal support
f47087a6dd62 wifi: mt76: mt7996: fix chainmask calculation in mt7996_set_antenna()
2f3b0acc1588 wifi: mt76: mt7996: update register for CFEND_RATE
7e9540dcbd70 wifi: mt76: mt7996: do not hardcode vht beamform cap
a37e427d0959 wifi: mt76: connac: fix POWER_CTRL command name typo
98aa346042bd wifi: mt76: mt7915: remove BW160 and BW80+80 support
94fed6a43541 wifi: mt76: mt7921: fix invalid remain_on_channel duration
3c162384d80a wifi: mt76: introduce mt76_queue_is_wed_rx utility routine
a409a9454587 wifi: mt76: mt7915: fix memory leak in mt7915_mcu_exit
8b27ecd3a684 wifi: mt76: mt7996: fix memory leak in mt7996_mcu_exit
683760461dd0 wifi: mt76: dma: free rx_head in mt76_dma_rx_cleanup
0c750cf08f85 wifi: mt76: dma: fix memory leak running mt76_dma_tx_cleanup
5de9ae29bea2 wifi: mt76: mt7915: avoid mcu_restart function pointer
dad96dd3e62d wifi: mt76: mt7603: avoid mcu_restart function pointer
19d36dd9c8ea wifi: mt76: mt7615: avoid mcu_restart function pointer
6fe2c2383d3d wifi: mt76: mt7921: avoid mcu_restart function pointer
9df89143bf71 wifi: mt76: mt7915: get rid of wed rx_buf_ring page_frag_cache
8d51d11760cb wifi: mt76: fix switch default case in mt7996_reverse_frag0_hdr_trans
0d8057dbd51c wifi: mt76: mt7921u: add support for Comfast CF-952AX
ddbf4e933d54 wifi: mt76: mt7915: set sku initial value to zero
06a8904e954e wifi: mt76: mt7915: wed: enable red per-band token drop
724a337caef9 wifi: mt76: mt7915: fix WED TxS reporting
747ca943a5bb wifi: mt76: add flexible polling wait-interval support
133d7859977a wifi: mt76: mt7921: reduce polling time in pmctrl
5fe319a0550e wifi: mt76: add memory barrier to SDIO queue kick
822f060b9d19 wifi: mt76: mt7921: fix rx filter incorrect by drv/fw inconsistent
c6794954a723 wifi: mt76: mt7915: fix memory leak in mt7915_mmio_wed_init_rx_buf
9686cd7cc65c wifi: mt76: switch to page_pool allocator
04da4eaa8235 wifi: mt76: enable page_pool stats
1af4a911ebcb wifi: mt76: mt7915: release rxwi in mt7915_wed_release_rx_buf
e8c10835cf06 wifi: mt76: fix compile error without CONFIG_PAGE_POOL_STATS
0cf0ede7cc42 net: ethernet: mtk_wed: add reset to rx_ring_setup callback
715b3ed9708a net: ethernet: mtk_wed: add reset to tx_ring_setup callback
9107381d0ff3 wifi: mt76: mt7921: fix error code of return in mt7921_acpi_read
36d2a5bf7802 wifi: mt76: mt7996: rely on mt76_connac2_mac_tx_rate_val
c67f57d2cda2 wifi: mt76: dma: add reset to mt76_dma_wed_setup signature
3dace36e2941 wifi: mt76: dma: reset wed queues in mt76_dma_rx_reset
4b229d2da562 wifi: mt76: mt7915: add mt7915 wed reset callbacks
f83958376085 wifi: mt76: mt7915: complete wed reset support
321edbb414dc wifi: mt76: mt7996: rely on mt76_connac_txp_common structure
bdb7dc38a6d1 wifi: mt76: mt7996: rely on mt76_connac_txp_skb_unmap
8688756305c6 wifi: mt76: mt7996: rely on mt76_connac_tx_complete_skb
fbf986dbd4c0 wifi: mt76: mt7996: rely on mt76_connac2_mac_decode_he_radiotap
adc556cbce37 wifi: mt76: mt7996: avoid mcu_restart function pointer
5eb4e2303be4 wifi: mt76: remove __mt76_mcu_restart macro
e7a61c5f70f5 wifi: mt76: add EHT phy type
b375845abc10 wifi: mt76: connac: add CMD_CBW_320MHZ
68b17a243332 wifi: mt76: connac: add helpers for EHT capability
02ec1f61b3a2 wifi: mt76: connac: add cmd id related to EHT support
9209294cd81b wifi: mt76: increase wcid size to 1088
5e85136c9b2f wifi: mt76: add EHT rate stats for ethtool
a171f672fdeb wifi: mt76: mt7996: add variants support
eda8fd62c105 wifi: mt76: mt7996: add helpers for wtbl and interface limit
4a5a9f4cdc3b wifi: mt76: mt7996: rework capability init
06b73c155680 wifi: mt76: mt7996: add EHT capability init
ae71a1b8294f wifi: mt76: mt7996: add support for EHT rate report
65bdfae2991d wifi: mt76: mt7996: enable EHT support in firmware
b2360d59747c wifi: mt76: mt7996: add EHT beamforming support
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'target/linux/generic/backport-5.15/729-21-v6.3-net-ethernet-mtk_eth_soc-add-dma-checks-to-mtk_hw_re.patch')
-rw-r--r-- | target/linux/generic/backport-5.15/729-21-v6.3-net-ethernet-mtk_eth_soc-add-dma-checks-to-mtk_hw_re.patch | 249 |
1 files changed, 249 insertions, 0 deletions
diff --git a/target/linux/generic/backport-5.15/729-21-v6.3-net-ethernet-mtk_eth_soc-add-dma-checks-to-mtk_hw_re.patch b/target/linux/generic/backport-5.15/729-21-v6.3-net-ethernet-mtk_eth_soc-add-dma-checks-to-mtk_hw_re.patch new file mode 100644 index 0000000000..240e7897c6 --- /dev/null +++ b/target/linux/generic/backport-5.15/729-21-v6.3-net-ethernet-mtk_eth_soc-add-dma-checks-to-mtk_hw_re.patch @@ -0,0 +1,249 @@ +From: Lorenzo Bianconi <lorenzo@kernel.org> +Date: Sat, 14 Jan 2023 18:01:31 +0100 +Subject: [PATCH] net: ethernet: mtk_eth_soc: add dma checks to + mtk_hw_reset_check + +Introduce mtk_hw_check_dma_hang routine to monitor possible dma hangs. + +Reviewed-by: Leon Romanovsky <leonro@nvidia.com> +Tested-by: Daniel Golle <daniel@makrotopia.org> +Co-developed-by: Sujuan Chen <sujuan.chen@mediatek.com> +Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com> +Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> +Signed-off-by: Paolo Abeni <pabeni@redhat.com> +--- + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -50,6 +50,7 @@ static const struct mtk_reg_map mtk_reg_ + .delay_irq = 0x0a0c, + .irq_status = 0x0a20, + .irq_mask = 0x0a28, ++ .adma_rx_dbg0 = 0x0a38, + .int_grp = 0x0a50, + }, + .qdma = { +@@ -79,6 +80,8 @@ static const struct mtk_reg_map mtk_reg_ + [0] = 0x2800, + [1] = 0x2c00, + }, ++ .pse_iq_sta = 0x0110, ++ .pse_oq_sta = 0x0118, + }; + + static const struct mtk_reg_map mt7628_reg_map = { +@@ -109,6 +112,7 @@ static const struct mtk_reg_map mt7986_r + .delay_irq = 0x620c, + .irq_status = 0x6220, + .irq_mask = 0x6228, ++ .adma_rx_dbg0 = 0x6238, + .int_grp = 0x6250, + }, + .qdma = { +@@ -138,6 +142,8 @@ static const struct mtk_reg_map mt7986_r + [0] = 0x4800, + [1] = 0x4c00, + }, ++ .pse_iq_sta = 0x0180, ++ .pse_oq_sta = 0x01a0, + }; + + /* strings used by ethtool */ +@@ -3282,6 +3288,102 @@ static void mtk_hw_warm_reset(struct mtk + val, rst_mask); + } + ++static bool mtk_hw_check_dma_hang(struct mtk_eth *eth) ++{ ++ const struct mtk_reg_map *reg_map = eth->soc->reg_map; ++ bool gmac1_tx, gmac2_tx, gdm1_tx, gdm2_tx; ++ bool oq_hang, cdm1_busy, adma_busy; ++ bool wtx_busy, cdm_full, oq_free; ++ u32 wdidx, val, gdm1_fc, gdm2_fc; ++ bool qfsm_hang, qfwd_hang; ++ bool ret = false; ++ ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) ++ return false; ++ ++ /* WDMA sanity checks */ ++ wdidx = mtk_r32(eth, reg_map->wdma_base[0] + 0xc); ++ ++ val = mtk_r32(eth, reg_map->wdma_base[0] + 0x204); ++ wtx_busy = FIELD_GET(MTK_TX_DMA_BUSY, val); ++ ++ val = mtk_r32(eth, reg_map->wdma_base[0] + 0x230); ++ cdm_full = !FIELD_GET(MTK_CDM_TXFIFO_RDY, val); ++ ++ oq_free = (!(mtk_r32(eth, reg_map->pse_oq_sta) & GENMASK(24, 16)) && ++ !(mtk_r32(eth, reg_map->pse_oq_sta + 0x4) & GENMASK(8, 0)) && ++ !(mtk_r32(eth, reg_map->pse_oq_sta + 0x10) & GENMASK(24, 16))); ++ ++ if (wdidx == eth->reset.wdidx && wtx_busy && cdm_full && oq_free) { ++ if (++eth->reset.wdma_hang_count > 2) { ++ eth->reset.wdma_hang_count = 0; ++ ret = true; ++ } ++ goto out; ++ } ++ ++ /* QDMA sanity checks */ ++ qfsm_hang = !!mtk_r32(eth, reg_map->qdma.qtx_cfg + 0x234); ++ qfwd_hang = !mtk_r32(eth, reg_map->qdma.qtx_cfg + 0x308); ++ ++ gdm1_tx = FIELD_GET(GENMASK(31, 16), mtk_r32(eth, MTK_FE_GDM1_FSM)) > 0; ++ gdm2_tx = FIELD_GET(GENMASK(31, 16), mtk_r32(eth, MTK_FE_GDM2_FSM)) > 0; ++ gmac1_tx = FIELD_GET(GENMASK(31, 24), mtk_r32(eth, MTK_MAC_FSM(0))) != 1; ++ gmac2_tx = FIELD_GET(GENMASK(31, 24), mtk_r32(eth, MTK_MAC_FSM(1))) != 1; ++ gdm1_fc = mtk_r32(eth, reg_map->gdm1_cnt + 0x24); ++ gdm2_fc = mtk_r32(eth, reg_map->gdm1_cnt + 0x64); ++ ++ if (qfsm_hang && qfwd_hang && ++ ((gdm1_tx && gmac1_tx && gdm1_fc < 1) || ++ (gdm2_tx && gmac2_tx && gdm2_fc < 1))) { ++ if (++eth->reset.qdma_hang_count > 2) { ++ eth->reset.qdma_hang_count = 0; ++ ret = true; ++ } ++ goto out; ++ } ++ ++ /* ADMA sanity checks */ ++ oq_hang = !!(mtk_r32(eth, reg_map->pse_oq_sta) & GENMASK(8, 0)); ++ cdm1_busy = !!(mtk_r32(eth, MTK_FE_CDM1_FSM) & GENMASK(31, 16)); ++ adma_busy = !(mtk_r32(eth, reg_map->pdma.adma_rx_dbg0) & GENMASK(4, 0)) && ++ !(mtk_r32(eth, reg_map->pdma.adma_rx_dbg0) & BIT(6)); ++ ++ if (oq_hang && cdm1_busy && adma_busy) { ++ if (++eth->reset.adma_hang_count > 2) { ++ eth->reset.adma_hang_count = 0; ++ ret = true; ++ } ++ goto out; ++ } ++ ++ eth->reset.wdma_hang_count = 0; ++ eth->reset.qdma_hang_count = 0; ++ eth->reset.adma_hang_count = 0; ++out: ++ eth->reset.wdidx = wdidx; ++ ++ return ret; ++} ++ ++static void mtk_hw_reset_monitor_work(struct work_struct *work) ++{ ++ struct delayed_work *del_work = to_delayed_work(work); ++ struct mtk_eth *eth = container_of(del_work, struct mtk_eth, ++ reset.monitor_work); ++ ++ if (test_bit(MTK_RESETTING, ð->state)) ++ goto out; ++ ++ /* DMA stuck checks */ ++ if (mtk_hw_check_dma_hang(eth)) ++ schedule_work(ð->pending_work); ++ ++out: ++ schedule_delayed_work(ð->reset.monitor_work, ++ MTK_DMA_MONITOR_TIMEOUT); ++} ++ + static int mtk_hw_init(struct mtk_eth *eth, bool reset) + { + u32 dma_mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA | +@@ -3614,6 +3716,7 @@ static int mtk_cleanup(struct mtk_eth *e + mtk_unreg_dev(eth); + mtk_free_dev(eth); + cancel_work_sync(ð->pending_work); ++ cancel_delayed_work_sync(ð->reset.monitor_work); + + return 0; + } +@@ -4041,6 +4144,7 @@ static int mtk_probe(struct platform_dev + + eth->rx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; + INIT_WORK(ð->rx_dim.work, mtk_dim_rx); ++ INIT_DELAYED_WORK(ð->reset.monitor_work, mtk_hw_reset_monitor_work); + + eth->tx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; + INIT_WORK(ð->tx_dim.work, mtk_dim_tx); +@@ -4245,6 +4349,8 @@ static int mtk_probe(struct platform_dev + NAPI_POLL_WEIGHT); + + platform_set_drvdata(pdev, eth); ++ schedule_delayed_work(ð->reset.monitor_work, ++ MTK_DMA_MONITOR_TIMEOUT); + + return 0; + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -256,6 +256,8 @@ + + #define MTK_RX_DONE_INT_V2 BIT(14) + ++#define MTK_CDM_TXFIFO_RDY BIT(7) ++ + /* QDMA Interrupt grouping registers */ + #define MTK_RLS_DONE_INT BIT(0) + +@@ -537,6 +539,17 @@ + #define MT7628_SDM_RBCNT (MT7628_SDM_OFFSET + 0x10c) + #define MT7628_SDM_CS_ERR (MT7628_SDM_OFFSET + 0x110) + ++#define MTK_FE_CDM1_FSM 0x220 ++#define MTK_FE_CDM2_FSM 0x224 ++#define MTK_FE_CDM3_FSM 0x238 ++#define MTK_FE_CDM4_FSM 0x298 ++#define MTK_FE_CDM5_FSM 0x318 ++#define MTK_FE_CDM6_FSM 0x328 ++#define MTK_FE_GDM1_FSM 0x228 ++#define MTK_FE_GDM2_FSM 0x22C ++ ++#define MTK_MAC_FSM(x) (0x1010C + ((x) * 0x100)) ++ + struct mtk_rx_dma { + unsigned int rxd1; + unsigned int rxd2; +@@ -933,6 +946,7 @@ struct mtk_reg_map { + u32 delay_irq; /* delay interrupt */ + u32 irq_status; /* interrupt status */ + u32 irq_mask; /* interrupt mask */ ++ u32 adma_rx_dbg0; + u32 int_grp; + } pdma; + struct { +@@ -959,6 +973,8 @@ struct mtk_reg_map { + u32 gdma_to_ppe0; + u32 ppe_base; + u32 wdma_base[2]; ++ u32 pse_iq_sta; ++ u32 pse_oq_sta; + }; + + /* struct mtk_eth_data - This is the structure holding all differences +@@ -1001,6 +1017,8 @@ struct mtk_soc_data { + } txrx; + }; + ++#define MTK_DMA_MONITOR_TIMEOUT msecs_to_jiffies(1000) ++ + /* currently no SoC has more than 2 macs */ + #define MTK_MAX_DEVS 2 + +@@ -1123,6 +1141,14 @@ struct mtk_eth { + struct rhashtable flow_table; + + struct bpf_prog __rcu *prog; ++ ++ struct { ++ struct delayed_work monitor_work; ++ u32 wdidx; ++ u8 wdma_hang_count; ++ u8 qdma_hang_count; ++ u8 adma_hang_count; ++ } reset; + }; + + /* struct mtk_mac - the structure that holds the info about the MACs of the |