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author | Stijn Tintel <stijn@linux-ipv6.be> | 2022-04-03 19:08:45 +0300 |
---|---|---|
committer | Petr Štetiar <ynezz@true.cz> | 2022-04-19 14:52:49 +0200 |
commit | f029912c07c177ae523c4b3ee86fbe4d3889788c (patch) | |
tree | 2d074584a1d05279cd55badce589793e7a017424 /target/linux/generic/backport-5.10 | |
parent | ad5a507df3de951ca8c87656f3bc7bda647ae4d3 (diff) | |
download | upstream-f029912c07c177ae523c4b3ee86fbe4d3889788c.tar.gz upstream-f029912c07c177ae523c4b3ee86fbe4d3889788c.tar.bz2 upstream-f029912c07c177ae523c4b3ee86fbe4d3889788c.zip |
Revert "kernel: backport MT7530 VLAN fix"
There are various reports on Github and in the forum that this commit
causes multiple problems.
This reverts commit ee6ba216d8ba1b02154c287e64d709a8bc7b0054.
Fixes: #9420
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
(cherry picked from commit 3e0daca6447c3d5b9eb6d24ecb8e52f256f385cc)
Diffstat (limited to 'target/linux/generic/backport-5.10')
5 files changed, 0 insertions, 523 deletions
diff --git a/target/linux/generic/backport-5.10/765-v5.15-net-dsa-mt7530-disable-learning-on-standalone-ports.patch b/target/linux/generic/backport-5.10/765-v5.15-net-dsa-mt7530-disable-learning-on-standalone-ports.patch deleted file mode 100644 index a0bb7fa888..0000000000 --- a/target/linux/generic/backport-5.10/765-v5.15-net-dsa-mt7530-disable-learning-on-standalone-ports.patch +++ /dev/null @@ -1,65 +0,0 @@ -From ba2203f36b981235556504fb7b62baee28512a40 Mon Sep 17 00:00:00 2001 -From: DENG Qingfang <dqfext@gmail.com> -Date: Tue, 24 Aug 2021 11:37:50 +0800 -Subject: [PATCH] net: dsa: mt7530: disable learning on standalone ports - -This is a partial backport of commit 5a30833b9a16f8d1aa15de06636f9317ca51f9df -("net: dsa: mt7530: support MDB and bridge flag operations") upstream. - -Make sure that the standalone ports start up with learning disabled. - -Signed-off-by: DENG Qingfang <dqfext@gmail.com> ---- - drivers/net/dsa/mt7530.c | 16 ++++++++++++++-- - 1 file changed, 14 insertions(+), 2 deletions(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -1163,6 +1163,8 @@ mt7530_port_bridge_join(struct dsa_switc - PCR_MATRIX_MASK, PCR_MATRIX(port_bitmap)); - priv->ports[port].pm |= PCR_MATRIX(port_bitmap); - -+ mt7530_clear(priv, MT7530_PSC_P(port), SA_DIS); -+ - mutex_unlock(&priv->reg_mutex); - - return 0; -@@ -1260,6 +1262,8 @@ mt7530_port_bridge_leave(struct dsa_swit - PCR_MATRIX(BIT(MT7530_CPU_PORT))); - priv->ports[port].pm = PCR_MATRIX(BIT(MT7530_CPU_PORT)); - -+ mt7530_set(priv, MT7530_PSC_P(port), SA_DIS); -+ - mutex_unlock(&priv->reg_mutex); - } - -@@ -1817,9 +1821,13 @@ mt7530_setup(struct dsa_switch *ds) - ret = mt753x_cpu_port_enable(ds, i); - if (ret) - return ret; -- } else -+ } else { - mt7530_port_disable(ds, i); - -+ /* Disable learning by default on all user ports */ -+ mt7530_set(priv, MT7530_PSC_P(i), SA_DIS); -+ } -+ - /* Enable consistent egress tag */ - mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK, - PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); -@@ -1979,9 +1987,13 @@ mt7531_setup(struct dsa_switch *ds) - ret = mt753x_cpu_port_enable(ds, i); - if (ret) - return ret; -- } else -+ } else { - mt7530_port_disable(ds, i); - -+ /* Disable learning by default on all user ports */ -+ mt7530_set(priv, MT7530_PSC_P(i), SA_DIS); -+ } -+ - /* Enable consistent egress tag */ - mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK, - PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); diff --git a/target/linux/generic/backport-5.10/766-v5.15-net-dsa-mt7530-enable-assisted-learning-on-CPU-port.patch b/target/linux/generic/backport-5.10/766-v5.15-net-dsa-mt7530-enable-assisted-learning-on-CPU-port.patch deleted file mode 100644 index f376ff949a..0000000000 --- a/target/linux/generic/backport-5.10/766-v5.15-net-dsa-mt7530-enable-assisted-learning-on-CPU-port.patch +++ /dev/null @@ -1,102 +0,0 @@ -From 59c8adbc8e2c7f6b46385f36962eadaad3ea2daa Mon Sep 17 00:00:00 2001 -From: DENG Qingfang <dqfext@gmail.com> -Date: Wed, 4 Aug 2021 00:04:01 +0800 -Subject: [PATCH] net: dsa: mt7530: enable assisted learning on CPU port - -Consider the following bridge configuration, where bond0 is not -offloaded: - - +-- br0 --+ - / / | \ - / / | \ - / | | bond0 - / | | / \ - swp0 swp1 swp2 swp3 swp4 - . . . - . . . - A B C - -Address learning is enabled on offloaded ports (swp0~2) and the CPU -port, so when client A sends a packet to C, the following will happen: - -1. The switch learns that client A can be reached at swp0. -2. The switch probably already knows that client C can be reached at the - CPU port, so it forwards the packet to the CPU. -3. The bridge core knows client C can be reached at bond0, so it - forwards the packet back to the switch. -4. The switch learns that client A can be reached at the CPU port. -5. The switch forwards the packet to either swp3 or swp4, according to - the packet's tag. - -That makes client A's MAC address flap between swp0 and the CPU port. If -client B sends a packet to A, it is possible that the packet is -forwarded to the CPU. With offload_fwd_mark = 1, the bridge core won't -forward it back to the switch, resulting in packet loss. - -As we have the assisted_learning_on_cpu_port in DSA core now, enable -that and disable hardware learning on the CPU port. - -Signed-off-by: DENG Qingfang <dqfext@gmail.com> -Reviewed-by: Vladimir Oltean <oltean@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/dsa/mt7530.c | 14 ++++++++------ - 1 file changed, 8 insertions(+), 6 deletions(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -1747,6 +1747,7 @@ mt7530_setup(struct dsa_switch *ds) - */ - dn = dsa_to_port(ds, MT7530_CPU_PORT)->master->dev.of_node->parent; - ds->configure_vlan_while_not_filtering = true; -+ ds->assisted_learning_on_cpu_port = true; - ds->mtu_enforcement_ingress = true; - - if (priv->id == ID_MT7530) { -@@ -1817,15 +1818,15 @@ mt7530_setup(struct dsa_switch *ds) - mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, - PCR_MATRIX_CLR); - -+ /* Disable learning by default on all ports */ -+ mt7530_set(priv, MT7530_PSC_P(i), SA_DIS); -+ - if (dsa_is_cpu_port(ds, i)) { - ret = mt753x_cpu_port_enable(ds, i); - if (ret) - return ret; - } else { - mt7530_port_disable(ds, i); -- -- /* Disable learning by default on all user ports */ -- mt7530_set(priv, MT7530_PSC_P(i), SA_DIS); - } - - /* Enable consistent egress tag */ -@@ -1981,6 +1982,9 @@ mt7531_setup(struct dsa_switch *ds) - mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, - PCR_MATRIX_CLR); - -+ /* Disable learning by default on all ports */ -+ mt7530_set(priv, MT7530_PSC_P(i), SA_DIS); -+ - mt7530_set(priv, MT7531_DBG_CNT(i), MT7531_DIS_CLR); - - if (dsa_is_cpu_port(ds, i)) { -@@ -1989,9 +1993,6 @@ mt7531_setup(struct dsa_switch *ds) - return ret; - } else { - mt7530_port_disable(ds, i); -- -- /* Disable learning by default on all user ports */ -- mt7530_set(priv, MT7530_PSC_P(i), SA_DIS); - } - - /* Enable consistent egress tag */ -@@ -2000,6 +2001,7 @@ mt7531_setup(struct dsa_switch *ds) - } - - ds->configure_vlan_while_not_filtering = true; -+ ds->assisted_learning_on_cpu_port = true; - ds->mtu_enforcement_ingress = true; - - /* Flush the FDB table */ diff --git a/target/linux/generic/backport-5.10/767-v5.15-net-dsa-mt7530-use-independent-VLAN-learning-on-VLAN.patch b/target/linux/generic/backport-5.10/767-v5.15-net-dsa-mt7530-use-independent-VLAN-learning-on-VLAN.patch deleted file mode 100644 index f9fe0ef858..0000000000 --- a/target/linux/generic/backport-5.10/767-v5.15-net-dsa-mt7530-use-independent-VLAN-learning-on-VLAN.patch +++ /dev/null @@ -1,262 +0,0 @@ -From e3a402764c5753698e7a9e45d4d21f093faa7852 Mon Sep 17 00:00:00 2001 -From: DENG Qingfang <dqfext@gmail.com> -Date: Wed, 4 Aug 2021 00:04:02 +0800 -Subject: [PATCH] net: dsa: mt7530: use independent VLAN learning on - VLAN-unaware bridges - -Consider the following bridge configuration, where bond0 is not -offloaded: - - +-- br0 --+ - / / | \ - / / | \ - / | | bond0 - / | | / \ - swp0 swp1 swp2 swp3 swp4 - . . . - . . . - A B C - -Ideally, when the switch receives a packet from swp3 or swp4, it should -forward the packet to the CPU, according to the port matrix and unknown -unicast flood settings. - -But packet loss will happen if the destination address is at one of the -offloaded ports (swp0~2). For example, when client C sends a packet to -A, the FDB lookup will indicate that it should be forwarded to swp0, but -the port matrix of swp3 and swp4 is configured to only allow the CPU to -be its destination, so it is dropped. - -However, this issue does not happen if the bridge is VLAN-aware. That is -because VLAN-aware bridges use independent VLAN learning, i.e. use VID -for FDB lookup, on offloaded ports. As swp3 and swp4 are not offloaded, -shared VLAN learning with default filter ID of 0 is used instead. So the -lookup for A with filter ID 0 never hits and the packet can be forwarded -to the CPU. - -In the current code, only two combinations were used to toggle user -ports' VLAN awareness: one is PCR.PORT_VLAN set to port matrix mode with -PVC.VLAN_ATTR set to transparent port, the other is PCR.PORT_VLAN set to -security mode with PVC.VLAN_ATTR set to user port. - -It turns out that only PVC.VLAN_ATTR contributes to VLAN awareness, and -port matrix mode just skips the VLAN table lookup. The reference manual -is somehow misleading when describing PORT_VLAN modes. It states that -PORT_MEM (VLAN port member) is used for destination if the VLAN table -lookup hits, but actually **PORT_MEM & PORT_MATRIX** (bitwise AND of -VLAN port member and port matrix) is used instead, which means we can -have two or more separate VLAN-aware bridges with the same PVID and -traffic won't leak between them. - -Therefore, to solve this, enable independent VLAN learning with PVID 0 -on VLAN-unaware bridges, by setting their PCR.PORT_VLAN to fallback -mode, while leaving standalone ports in port matrix mode. The CPU port -is always set to fallback mode to serve those bridges. - -During testing, it is found that FDB lookup with filter ID of 0 will -also hit entries with VID 0 even with independent VLAN learning. To -avoid that, install all VLANs with filter ID of 1. - -Signed-off-by: DENG Qingfang <dqfext@gmail.com> -Reviewed-by: Vladimir Oltean <olteanv@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/dsa/mt7530.c | 72 +++++++++++++++++++++++++++++----------- - drivers/net/dsa/mt7530.h | 9 ++++- - 2 files changed, 60 insertions(+), 21 deletions(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -1011,6 +1011,10 @@ mt753x_cpu_port_enable(struct dsa_switch - mt7530_write(priv, MT7530_PCR_P(port), - PCR_MATRIX(dsa_user_ports(priv->ds))); - -+ /* Set to fallback mode for independent VLAN learning */ -+ mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, -+ MT7530_PORT_FALLBACK_MODE); -+ - return 0; - } - -@@ -1165,6 +1169,10 @@ mt7530_port_bridge_join(struct dsa_switc - - mt7530_clear(priv, MT7530_PSC_P(port), SA_DIS); - -+ /* Set to fallback mode for independent VLAN learning */ -+ mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, -+ MT7530_PORT_FALLBACK_MODE); -+ - mutex_unlock(&priv->reg_mutex); - - return 0; -@@ -1177,16 +1185,21 @@ mt7530_port_set_vlan_unaware(struct dsa_ - bool all_user_ports_removed = true; - int i; - -- /* When a port is removed from the bridge, the port would be set up -- * back to the default as is at initial boot which is a VLAN-unaware -- * port. -+ /* This is called after .port_bridge_leave when leaving a VLAN-aware -+ * bridge. Don't set standalone ports to fallback mode. - */ -- mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, -- MT7530_PORT_MATRIX_MODE); -+ if (dsa_to_port(ds, port)->bridge_dev) -+ mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, -+ MT7530_PORT_FALLBACK_MODE); -+ - mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK | PVC_EG_TAG_MASK, - VLAN_ATTR(MT7530_VLAN_TRANSPARENT) | - PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); - -+ /* Set PVID to 0 */ -+ mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK, -+ G0_PORT_VID_DEF); -+ - for (i = 0; i < MT7530_NUM_PORTS; i++) { - if (dsa_is_user_port(ds, i) && - dsa_port_is_vlan_filtering(dsa_to_port(ds, i))) { -@@ -1212,15 +1225,14 @@ mt7530_port_set_vlan_aware(struct dsa_sw - struct mt7530_priv *priv = ds->priv; - - /* Trapped into security mode allows packet forwarding through VLAN -- * table lookup. CPU port is set to fallback mode to let untagged -- * frames pass through. -+ * table lookup. - */ -- if (dsa_is_cpu_port(ds, port)) -- mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, -- MT7530_PORT_FALLBACK_MODE); -- else -+ if (dsa_is_user_port(ds, port)) { - mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, - MT7530_PORT_SECURITY_MODE); -+ mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK, -+ G0_PORT_VID(priv->ports[port].pvid)); -+ } - - /* Set the port as a user port which is to be able to recognize VID - * from incoming packets before fetching entry within the VLAN table. -@@ -1264,6 +1276,13 @@ mt7530_port_bridge_leave(struct dsa_swit - - mt7530_set(priv, MT7530_PSC_P(port), SA_DIS); - -+ /* When a port is removed from the bridge, the port would be set up -+ * back to the default as is at initial boot which is a VLAN-unaware -+ * port. -+ */ -+ mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, -+ MT7530_PORT_MATRIX_MODE); -+ - mutex_unlock(&priv->reg_mutex); - } - -@@ -1406,7 +1425,8 @@ mt7530_hw_vlan_add(struct mt7530_priv *p - /* Validate the entry with independent learning, create egress tag per - * VLAN and joining the port as one of the port members. - */ -- val = IVL_MAC | VTAG_EN | PORT_MEM(new_members) | VLAN_VALID; -+ val = IVL_MAC | VTAG_EN | PORT_MEM(new_members) | FID(FID_BRIDGED) | -+ VLAN_VALID; - mt7530_write(priv, MT7530_VAWD1, val); - - /* Decide whether adding tag or not for those outgoing packets from the -@@ -1499,9 +1519,13 @@ mt7530_port_vlan_add(struct dsa_switch * - } - - if (pvid) { -- mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK, -- G0_PORT_VID(vlan->vid_end)); - priv->ports[port].pvid = vlan->vid_end; -+ -+ /* Only configure PVID if VLAN filtering is enabled */ -+ if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) -+ mt7530_rmw(priv, MT7530_PPBV1_P(port), -+ G0_PORT_VID_MASK, -+ G0_PORT_VID(vlan->vid_end)); - } - - mutex_unlock(&priv->reg_mutex); -@@ -1513,11 +1537,10 @@ mt7530_port_vlan_del(struct dsa_switch * - { - struct mt7530_hw_vlan_entry target_entry; - struct mt7530_priv *priv = ds->priv; -- u16 vid, pvid; -+ u16 vid; - - mutex_lock(&priv->reg_mutex); - -- pvid = priv->ports[port].pvid; - for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) { - mt7530_hw_vlan_entry_init(&target_entry, port, 0); - mt7530_hw_vlan_update(priv, vid, &target_entry, -@@ -1526,12 +1549,13 @@ mt7530_port_vlan_del(struct dsa_switch * - /* PVID is being restored to the default whenever the PVID port - * is being removed from the VLAN. - */ -- if (pvid == vid) -- pvid = G0_PORT_VID_DEF; -+ if (priv->ports[port].pvid == vid) { -+ priv->ports[port].pvid = G0_PORT_VID_DEF; -+ mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK, -+ G0_PORT_VID_DEF); -+ } - } - -- mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK, pvid); -- priv->ports[port].pvid = pvid; - - mutex_unlock(&priv->reg_mutex); - -@@ -1827,6 +1851,10 @@ mt7530_setup(struct dsa_switch *ds) - return ret; - } else { - mt7530_port_disable(ds, i); -+ -+ /* Set default PVID to 0 on all user ports */ -+ mt7530_rmw(priv, MT7530_PPBV1_P(i), G0_PORT_VID_MASK, -+ G0_PORT_VID_DEF); - } - - /* Enable consistent egress tag */ -@@ -1993,6 +2021,10 @@ mt7531_setup(struct dsa_switch *ds) - return ret; - } else { - mt7530_port_disable(ds, i); -+ -+ /* Set default PVID to 0 on all user ports */ -+ mt7530_rmw(priv, MT7530_PPBV1_P(i), G0_PORT_VID_MASK, -+ G0_PORT_VID_DEF); - } - - /* Enable consistent egress tag */ ---- a/drivers/net/dsa/mt7530.h -+++ b/drivers/net/dsa/mt7530.h -@@ -145,11 +145,18 @@ enum mt7530_vlan_cmd { - #define VTAG_EN BIT(28) - /* VLAN Member Control */ - #define PORT_MEM(x) (((x) & 0xff) << 16) -+/* Filter ID */ -+#define FID(x) (((x) & 0x7) << 1) - /* VLAN Entry Valid */ - #define VLAN_VALID BIT(0) - #define PORT_MEM_SHFT 16 - #define PORT_MEM_MASK 0xff - -+enum mt7530_fid { -+ FID_STANDALONE = 0, -+ FID_BRIDGED = 1, -+}; -+ - #define MT7530_VAWD2 0x98 - /* Egress Tag Control */ - #define ETAG_CTRL_P(p, x) (((x) & 0x3) << ((p) << 1)) -@@ -244,7 +251,7 @@ enum mt7530_vlan_port_attr { - #define MT7530_PPBV1_P(x) (0x2014 + ((x) * 0x100)) - #define G0_PORT_VID(x) (((x) & 0xfff) << 0) - #define G0_PORT_VID_MASK G0_PORT_VID(0xfff) --#define G0_PORT_VID_DEF G0_PORT_VID(1) -+#define G0_PORT_VID_DEF G0_PORT_VID(0) - - /* Register for port MAC control register */ - #define MT7530_PMCR_P(x) (0x3000 + ((x) * 0x100)) diff --git a/target/linux/generic/backport-5.10/768-v5.15-net-dsa-mt7530-set-STP-state-on-filter-ID-1.patch b/target/linux/generic/backport-5.10/768-v5.15-net-dsa-mt7530-set-STP-state-on-filter-ID-1.patch deleted file mode 100644 index 2c1958bd43..0000000000 --- a/target/linux/generic/backport-5.10/768-v5.15-net-dsa-mt7530-set-STP-state-on-filter-ID-1.patch +++ /dev/null @@ -1,40 +0,0 @@ -From c5ffcefcb40420528d04c63e7dfc88f2845c9831 Mon Sep 17 00:00:00 2001 -From: DENG Qingfang <dqfext@gmail.com> -Date: Wed, 4 Aug 2021 00:04:03 +0800 -Subject: [PATCH] net: dsa: mt7530: set STP state on filter ID 1 - -As filter ID 1 is the only one used for bridges, set STP state on it. - -Signed-off-by: DENG Qingfang <dqfext@gmail.com> -Reviewed-by: Vladimir Oltean <olteanv@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/dsa/mt7530.c | 3 ++- - drivers/net/dsa/mt7530.h | 4 ++-- - 2 files changed, 4 insertions(+), 3 deletions(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -1131,7 +1131,8 @@ mt7530_stp_state_set(struct dsa_switch * - break; - } - -- mt7530_rmw(priv, MT7530_SSP_P(port), FID_PST_MASK, stp_state); -+ mt7530_rmw(priv, MT7530_SSP_P(port), FID_PST_MASK(FID_BRIDGED), -+ FID_PST(FID_BRIDGED, stp_state)); - } - - static int ---- a/drivers/net/dsa/mt7530.h -+++ b/drivers/net/dsa/mt7530.h -@@ -183,8 +183,8 @@ enum mt7530_vlan_egress_attr { - - /* Register for port STP state control */ - #define MT7530_SSP_P(x) (0x2000 + ((x) * 0x100)) --#define FID_PST(x) ((x) & 0x3) --#define FID_PST_MASK FID_PST(0x3) -+#define FID_PST(fid, state) (((state) & 0x3) << ((fid) * 2)) -+#define FID_PST_MASK(fid) FID_PST(fid, 0x3) - - enum mt7530_stp_state { - MT7530_STP_DISABLED = 0, diff --git a/target/linux/generic/backport-5.10/769-v5.15-net-dsa-mt7530-always-install-FDB-entries-with-IVL-a.patch b/target/linux/generic/backport-5.10/769-v5.15-net-dsa-mt7530-always-install-FDB-entries-with-IVL-a.patch deleted file mode 100644 index 97824068f0..0000000000 --- a/target/linux/generic/backport-5.10/769-v5.15-net-dsa-mt7530-always-install-FDB-entries-with-IVL-a.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 138c126a33f7564edb66b1da5b847e4a60740bfc Mon Sep 17 00:00:00 2001 -From: DENG Qingfang <dqfext@gmail.com> -Date: Wed, 4 Aug 2021 00:04:04 +0800 -Subject: [PATCH] net: dsa: mt7530: always install FDB entries with IVL and FID - 1 - -This reverts commit 7e777021780e ("mt7530 mt7530_fdb_write only set ivl -bit vid larger than 1"). - -Before this series, the default value of all ports' PVID is 1, which is -copied into the FDB entry, even if the ports are VLAN unaware. So -`bridge fdb show` will show entries like `dev swp0 vlan 1 self` even on -a VLAN-unaware bridge. - -The blamed commit does not solve that issue completely, instead it may -cause a new issue that FDB is inaccessible in a VLAN-aware bridge with -PVID 1. - -This series sets PVID to 0 on VLAN-unaware ports, so `bridge fdb show` -will no longer print `vlan 1` on VLAN-unaware bridges, and that special -case in fdb_write is not required anymore. - -Set FDB entries' filter ID to 1 to match the VLAN table. - -Signed-off-by: DENG Qingfang <dqfext@gmail.com> -Reviewed-by: Vladimir Oltean <olteanv@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/dsa/mt7530.c | 2 ++ - drivers/net/dsa/mt7530.h | 2 ++ - 2 files changed, 4 insertions(+) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -361,6 +361,8 @@ mt7530_fdb_write(struct mt7530_priv *pri - int i; - - reg[1] |= vid & CVID_MASK; -+ reg[1] |= ATA2_IVL; -+ reg[1] |= ATA2_FID(FID_BRIDGED); - reg[2] |= (aging & AGE_TIMER_MASK) << AGE_TIMER; - reg[2] |= (port_mask & PORT_MAP_MASK) << PORT_MAP; - /* STATIC_ENT indicate that entry is static wouldn't ---- a/drivers/net/dsa/mt7530.h -+++ b/drivers/net/dsa/mt7530.h -@@ -77,6 +77,8 @@ enum mt753x_bpdu_port_fw { - #define STATIC_EMP 0 - #define STATIC_ENT 3 - #define MT7530_ATA2 0x78 -+#define ATA2_IVL BIT(15) -+#define ATA2_FID(x) (((x) & 0x7) << 12) - - /* Register for address table write data */ - #define MT7530_ATWD 0x7c |