cns3xxx: update to linux 4.4

Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 48334

24 files changed, 0 insertions, 1139 deletions

diff --git a/target/linux/cns3xxx/patches-3.18/000-cns3xxx_arch_include.patch b/target/linux/cns3xxx/patches-3.18/000-cns3xxx_arch_include.patch
deleted file mode 100644
index f98fe0c2ba..0000000000
--- a/target/linux/cns3xxx/patches-3.18/000-cns3xxx_arch_include.patch
+++ /dev/null
@@ -1,8 +0,0 @@
---- a/arch/arm/mach-cns3xxx/Makefile
-+++ b/arch/arm/mach-cns3xxx/Makefile
-@@ -1,3 +1,5 @@
-+ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
-+
- obj-$(CONFIG_ARCH_CNS3XXX)		+= cns3xxx.o
- cns3xxx-y				+= core.o pm.o
- cns3xxx-$(CONFIG_ATAGS)			+= devices.o
diff --git a/target/linux/cns3xxx/patches-3.18/001-cns3xxx_section_fix.patch b/target/linux/cns3xxx/patches-3.18/001-cns3xxx_section_fix.patch
deleted file mode 100644
index ba0e7259f9..0000000000
--- a/target/linux/cns3xxx/patches-3.18/001-cns3xxx_section_fix.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- a/arch/arm/mach-cns3xxx/core.c
-+++ b/arch/arm/mach-cns3xxx/core.c
-@@ -339,7 +339,7 @@ static struct usb_ohci_pdata cns3xxx_usb
- 	.power_off	= csn3xxx_usb_power_off,
- };
- 
--static struct of_dev_auxdata cns3xxx_auxdata[] __initconst = {
-+static const struct of_dev_auxdata cns3xxx_auxdata[] __initconst = {
- 	{ "intel,usb-ehci", CNS3XXX_USB_BASE, "ehci-platform", &cns3xxx_usb_ehci_pdata },
- 	{ "intel,usb-ohci", CNS3XXX_USB_OHCI_BASE, "ohci-platform", &cns3xxx_usb_ohci_pdata },
- 	{ "cavium,cns3420-ahci", CNS3XXX_SATA2_BASE, "ahci", NULL },
diff --git a/target/linux/cns3xxx/patches-3.18/010-arm_introduce-dma-fiq-irq-broadcast.patch b/target/linux/cns3xxx/patches-3.18/010-arm_introduce-dma-fiq-irq-broadcast.patch
deleted file mode 100644
index dd02323164..0000000000
--- a/target/linux/cns3xxx/patches-3.18/010-arm_introduce-dma-fiq-irq-broadcast.patch
+++ /dev/null
@@ -1,64 +0,0 @@
---- a/arch/arm/include/asm/glue-cache.h
-+++ b/arch/arm/include/asm/glue-cache.h
-@@ -156,11 +156,19 @@ static inline void nop_dma_unmap_area(co
- #define __cpuc_flush_user_range		__glue(_CACHE,_flush_user_cache_range)
- #define __cpuc_coherent_kern_range	__glue(_CACHE,_coherent_kern_range)
- #define __cpuc_coherent_user_range	__glue(_CACHE,_coherent_user_range)
-+#ifndef CONFIG_DMA_CACHE_FIQ_BROADCAST
- #define __cpuc_flush_dcache_area	__glue(_CACHE,_flush_kern_dcache_area)
- 
- #define dmac_map_area			__glue(_CACHE,_dma_map_area)
- #define dmac_unmap_area			__glue(_CACHE,_dma_unmap_area)
- #define dmac_flush_range		__glue(_CACHE,_dma_flush_range)
-+#else
-+#define __cpuc_flush_dcache_area	__glue(fiq,_flush_kern_dcache_area)
-+
-+#define dmac_map_area			__glue(fiq,_dma_map_area)
-+#define dmac_unmap_area			__glue(fiq,_dma_unmap_area)
-+#define dmac_flush_range		__glue(fiq,_dma_flush_range)
-+#endif /* CONFIG_DMA_CACHE_FIQ_BROADCAST */
- #endif
- 
- #endif
---- a/arch/arm/mm/Kconfig
-+++ b/arch/arm/mm/Kconfig
-@@ -844,6 +844,17 @@ config DMA_CACHE_RWFO
- 	  in hardware, other workarounds are needed (e.g. cache
- 	  maintenance broadcasting in software via FIQ).
- 
-+config DMA_CACHE_FIQ_BROADCAST
-+	bool "Enable fiq broadcast DMA cache maintenance"
-+	depends on CPU_V6K && SMP
-+	select FIQ
-+	help
-+	  The Snoop Control Unit on ARM11MPCore does not detect the
-+	  cache maintenance operations and the dma_{map,unmap}_area()
-+	  functions may leave stale cache entries on other CPUs. By
-+	  enabling this option, fiq broadcast in the ARMv6
-+	  DMA cache maintenance functions is performed.
-+
- config OUTER_CACHE
- 	bool
- 
---- a/arch/arm/mm/flush.c
-+++ b/arch/arm/mm/flush.c
-@@ -304,6 +304,7 @@ void __sync_icache_dcache(pte_t pteval)
- void flush_dcache_page(struct page *page)
- {
- 	struct address_space *mapping;
-+	bool skip_broadcast = true;
- 
- 	/*
- 	 * The zero page is never written to, so never has any dirty
-@@ -314,7 +315,10 @@ void flush_dcache_page(struct page *page
- 
- 	mapping = page_mapping(page);
- 
--	if (!cache_ops_need_broadcast() &&
-+#ifndef CONFIG_DMA_CACHE_FIQ_BROADCAST
-+	skip_broadcast = !cache_ops_need_broadcast();
-+#endif
-+	if (skip_broadcast &&
- 	    mapping && !page_mapped(page))
- 		clear_bit(PG_dcache_clean, &page->flags);
- 	else {
diff --git a/target/linux/cns3xxx/patches-3.18/020-watchdog_support.patch b/target/linux/cns3xxx/patches-3.18/020-watchdog_support.patch
deleted file mode 100644
index 74ffcc34bf..0000000000
--- a/target/linux/cns3xxx/patches-3.18/020-watchdog_support.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-1. Made the connection between CNS3xxx SOCs(ARCH_CNS3xxx) and MPcore watchdog
-   since the CNS3xxx SOCs have ARM11 MPcore CPU.
-2. Enable mpcore_watchdog option as module to default configuration at
-   arch/arm/configs/cns3420vb_defconfig.
-
-Signed-off-by: Tommy Lin <tommy.lin@caviumnetworks.com>
-
----
-arch/arm/Kconfig                     |    1 +
- arch/arm/configs/cns3420vb_defconfig |    2 ++
- arch/arm/mach-cns3xxx/cns3420vb.c    |   22 ++++++++++++++++++++++
- 3 files changed, 25 insertions(+), 0 deletions(-)
-
---- a/arch/arm/configs/cns3420vb_defconfig
-+++ b/arch/arm/configs/cns3420vb_defconfig
-@@ -56,6 +56,8 @@ CONFIG_LEGACY_PTY_COUNT=16
- # CONFIG_HW_RANDOM is not set
- # CONFIG_HWMON is not set
- # CONFIG_VGA_CONSOLE is not set
-+CONFIG_WATCHDOG=y
-+CONFIG_MPCORE_WATCHDOG=m
- # CONFIG_HID_SUPPORT is not set
- # CONFIG_USB_SUPPORT is not set
- CONFIG_MMC=y
---- a/arch/arm/mach-cns3xxx/cns3420vb.c
-+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
-@@ -206,10 +206,32 @@ static struct platform_device cns3xxx_us
- 	},
- };
- 
-+/* Watchdog */
-+static struct resource cns3xxx_watchdog_resources[] = {
-+	[0] = {
-+		.start = CNS3XXX_TC11MP_TWD_BASE,
-+		.end   = CNS3XXX_TC11MP_TWD_BASE + PAGE_SIZE - 1,
-+		.flags = IORESOURCE_MEM,
-+	},
-+	[1] = {
-+		.start = IRQ_LOCALWDOG,
-+		.end   = IRQ_LOCALWDOG,
-+		.flags = IORESOURCE_IRQ,
-+	}
-+};
-+
-+static struct platform_device cns3xxx_watchdog_device = {
-+	.name		= "mpcore_wdt",
-+	.id		= -1,
-+	.num_resources	= ARRAY_SIZE(cns3xxx_watchdog_resources),
-+	.resource	= cns3xxx_watchdog_resources,
-+};
-+
- /*
-  * Initialization
-  */
- static struct platform_device *cns3420_pdevs[] __initdata = {
-+	&cns3xxx_watchdog_device,
- 	&cns3420_nor_pdev,
- 	&cns3xxx_usb_ehci_device,
- 	&cns3xxx_usb_ohci_device,
diff --git a/target/linux/cns3xxx/patches-3.18/025-smp_support.patch b/target/linux/cns3xxx/patches-3.18/025-smp_support.patch
deleted file mode 100644
index 2a9d997a50..0000000000
--- a/target/linux/cns3xxx/patches-3.18/025-smp_support.patch
+++ /dev/null
@@ -1,30 +0,0 @@
---- a/arch/arm/mach-cns3xxx/Makefile
-+++ b/arch/arm/mach-cns3xxx/Makefile
-@@ -5,3 +5,5 @@ cns3xxx-y				+= core.o pm.o
- cns3xxx-$(CONFIG_ATAGS)			+= devices.o
- cns3xxx-$(CONFIG_PCI)			+= pcie.o
- cns3xxx-$(CONFIG_MACH_CNS3420VB)	+= cns3420vb.o
-+cns3xxx-$(CONFIG_SMP)			+= platsmp.o headsmp.o
-+cns3xxx-$(CONFIG_HOTPLUG_CPU)		+= hotplug.o
---- a/arch/arm/mach-cns3xxx/Kconfig
-+++ b/arch/arm/mach-cns3xxx/Kconfig
-@@ -2,6 +2,9 @@ menuconfig ARCH_CNS3XXX
- 	bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6
- 	select ARM_GIC
- 	select PCI_DOMAINS if PCI
-+	select HAVE_ARM_SCU if SMP
-+	select HAVE_ARM_TWD
-+	select HAVE_SMP
- 	help
- 	  Support for Cavium Networks CNS3XXX platform.
- 
---- a/arch/arm/mach-cns3xxx/core.h
-+++ b/arch/arm/mach-cns3xxx/core.h
-@@ -13,6 +13,7 @@
- 
- #include <linux/reboot.h>
- 
-+extern struct smp_operations cns3xxx_smp_ops;
- extern void cns3xxx_timer_init(void);
- 
- #ifdef CONFIG_CACHE_L2X0
diff --git a/target/linux/cns3xxx/patches-3.18/030-pcie_clock.patch b/target/linux/cns3xxx/patches-3.18/030-pcie_clock.patch
deleted file mode 100644
index 45c73cb756..0000000000
--- a/target/linux/cns3xxx/patches-3.18/030-pcie_clock.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- a/arch/arm/mach-cns3xxx/pcie.c
-+++ b/arch/arm/mach-cns3xxx/pcie.c
-@@ -331,8 +331,6 @@ void __init cns3xxx_pcie_init_late(void)
- 			"imprecise external abort");
- 
- 	for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
--		cns3xxx_pwr_clk_en(0x1 << PM_CLK_GATE_REG_OFFSET_PCIE(i));
--		cns3xxx_pwr_soft_rst(0x1 << PM_SOFT_RST_REG_OFFST_PCIE(i));
- 		cns3xxx_pcie_check_link(&cns3xxx_pcie[i]);
- 		cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]);
- 		pci_common_init(&cns3xxx_pcie[i].hw_pci);
diff --git a/target/linux/cns3xxx/patches-3.18/031-pcie_init.patch b/target/linux/cns3xxx/patches-3.18/031-pcie_init.patch
deleted file mode 100644
index 651d1a2f07..0000000000
--- a/target/linux/cns3xxx/patches-3.18/031-pcie_init.patch
+++ /dev/null
@@ -1,33 +0,0 @@
---- a/arch/arm/mach-cns3xxx/laguna.c
-+++ b/arch/arm/mach-cns3xxx/laguna.c
-@@ -849,7 +849,6 @@ static struct map_desc laguna_io_desc[]
- static void __init laguna_map_io(void)
- {
- 	cns3xxx_map_io();
--	cns3xxx_pcie_iotable_init();
- 	iotable_init(ARRAY_AND_SIZE(laguna_io_desc));
- 	laguna_early_serial_setup();
- }
-@@ -873,15 +872,6 @@ static int laguna_register_gpio(struct g
- 	return ret;
- }
- 
--static int __init laguna_pcie_init(void)
--{
--	if (!machine_is_gw2388())
--		return 0;
--
--	return cns3xxx_pcie_init();
--}
--subsys_initcall(laguna_pcie_init);
--
- static int __init laguna_model_setup(void)
- {
- 	u32 __iomem *mem;
-@@ -1077,5 +1067,6 @@ MACHINE_START(GW2388, "Gateworks Corpora
- 	.init_irq	= cns3xxx_init_irq,
- 	.init_time	= cns3xxx_timer_init,
- 	.init_machine	= laguna_init,
-+	.init_late      = cns3xxx_pcie_init_late,
- 	.restart	= cns3xxx_restart,
- MACHINE_END
diff --git a/target/linux/cns3xxx/patches-3.18/040-fiq_support.patch b/target/linux/cns3xxx/patches-3.18/040-fiq_support.patch
deleted file mode 100644
index 16774a6a3e..0000000000
--- a/target/linux/cns3xxx/patches-3.18/040-fiq_support.patch
+++ /dev/null
@@ -1,40 +0,0 @@
---- a/arch/arm/mach-cns3xxx/Kconfig
-+++ b/arch/arm/mach-cns3xxx/Kconfig
-@@ -5,6 +5,7 @@ menuconfig ARCH_CNS3XXX
- 	select HAVE_ARM_SCU if SMP
- 	select HAVE_ARM_TWD
- 	select HAVE_SMP
-+	select FIQ
- 	help
- 	  Support for Cavium Networks CNS3XXX platform.
- 
---- a/arch/arm/mach-cns3xxx/Makefile
-+++ b/arch/arm/mach-cns3xxx/Makefile
-@@ -5,5 +5,5 @@ cns3xxx-y				+= core.o pm.o
- cns3xxx-$(CONFIG_ATAGS)			+= devices.o
- cns3xxx-$(CONFIG_PCI)			+= pcie.o
- cns3xxx-$(CONFIG_MACH_CNS3420VB)	+= cns3420vb.o
--cns3xxx-$(CONFIG_SMP)			+= platsmp.o headsmp.o
-+cns3xxx-$(CONFIG_SMP)			+= platsmp.o headsmp.o cns3xxx_fiq.o
- cns3xxx-$(CONFIG_HOTPLUG_CPU)		+= hotplug.o
---- a/arch/arm/mach-cns3xxx/cns3xxx.h
-+++ b/arch/arm/mach-cns3xxx/cns3xxx.h
-@@ -267,6 +267,7 @@
- #define MISC_PCIE_INT_MASK(x)			MISC_MEM_MAP(0x978 + (x) * 0x100)
- #define MISC_PCIE_INT_STATUS(x)			MISC_MEM_MAP(0x97C + (x) * 0x100)
- 
-+#define MISC_FIQ_CPU(x)				MISC_MEM_MAP(0xA58 - (x) * 0x4)
- /*
-  * Power management and clock control
-  */
---- a/arch/arm/mm/Kconfig
-+++ b/arch/arm/mm/Kconfig
-@@ -827,7 +827,7 @@ config KUSER_HELPERS
- 
- config DMA_CACHE_RWFO
- 	bool "Enable read/write for ownership DMA cache maintenance"
--	depends on CPU_V6K && SMP
-+	depends on CPU_V6K && SMP && !ARCH_CNS3XXX
- 	default y
- 	help
- 	  The Snoop Control Unit on ARM11MPCore does not detect the
diff --git a/target/linux/cns3xxx/patches-3.18/045-twd_base.patch b/target/linux/cns3xxx/patches-3.18/045-twd_base.patch
deleted file mode 100644
index a265f9ca8b..0000000000
--- a/target/linux/cns3xxx/patches-3.18/045-twd_base.patch
+++ /dev/null
@@ -1,43 +0,0 @@
---- a/arch/arm/mach-cns3xxx/core.c
-+++ b/arch/arm/mach-cns3xxx/core.c
-@@ -17,6 +17,7 @@
- #include <linux/platform_device.h>
- #include <linux/usb/ehci_pdriver.h>
- #include <linux/usb/ohci_pdriver.h>
-+#include <asm/smp_twd.h>
- #include <asm/mach/arch.h>
- #include <asm/mach/map.h>
- #include <asm/mach/time.h>
-@@ -26,6 +27,8 @@
- #include "core.h"
- #include "pm.h"
- 
-+#define IRQ_LOCALTIMER 29
-+
- static struct map_desc cns3xxx_io_desc[] __initdata = {
- 	{
- 		.virtual	= CNS3XXX_TC11MP_SCU_BASE_VIRT,
-@@ -191,6 +194,15 @@ static struct irqaction cns3xxx_timer_ir
- 	.handler	= cns3xxx_timer_interrupt,
- };
- 
-+static void __init cns3xxx_init_twd(void)
-+{
-+	static DEFINE_TWD_LOCAL_TIMER(cns3xx_twd_local_timer,
-+		CNS3XXX_TC11MP_TWD_BASE,
-+		IRQ_LOCALTIMER);
-+
-+	twd_local_timer_register(&cns3xx_twd_local_timer);
-+}
-+
- /*
-  * Set up the clock source and clock events devices
-  */
-@@ -244,6 +256,7 @@ static void __init __cns3xxx_timer_init(
- 	setup_irq(timer_irq, &cns3xxx_timer_irq);
- 
- 	cns3xxx_clockevents_init(timer_irq);
-+	cns3xxx_init_twd();
- }
- 
- void __init cns3xxx_timer_init(void)
diff --git a/target/linux/cns3xxx/patches-3.18/055-pcie_io.patch b/target/linux/cns3xxx/patches-3.18/055-pcie_io.patch
deleted file mode 100644
index 4680853e6e..0000000000
--- a/target/linux/cns3xxx/patches-3.18/055-pcie_io.patch
+++ /dev/null
@@ -1,19 +0,0 @@
---- a/arch/arm/mach-cns3xxx/core.c
-+++ b/arch/arm/mach-cns3xxx/core.c
-@@ -81,6 +81,16 @@ static struct map_desc cns3xxx_io_desc[]
- 		.pfn		= __phys_to_pfn(CNS3XXX_PCIE1_CFG1_BASE),
- 		.length		= SZ_16M,
- 		.type		= MT_DEVICE,
-+	}, {
-+		.virtual	= CNS3XXX_PCIE0_IO_BASE_VIRT,
-+		.pfn		= __phys_to_pfn(CNS3XXX_PCIE0_IO_BASE),
-+		.length		= SZ_16M,
-+		.type		= MT_DEVICE,
-+	}, {
-+		.virtual	= CNS3XXX_PCIE1_IO_BASE_VIRT,
-+		.pfn		= __phys_to_pfn(CNS3XXX_PCIE1_IO_BASE),
-+		.length		= SZ_16M,
-+		.type		= MT_DEVICE,
- #endif
- 	},
- };
diff --git a/target/linux/cns3xxx/patches-3.18/060-pcie_abort.patch b/target/linux/cns3xxx/patches-3.18/060-pcie_abort.patch
deleted file mode 100644
index d72629f13f..0000000000
--- a/target/linux/cns3xxx/patches-3.18/060-pcie_abort.patch
+++ /dev/null
@@ -1,129 +0,0 @@
---- a/arch/arm/mach-cns3xxx/pcie.c
-+++ b/arch/arm/mach-cns3xxx/pcie.c
-@@ -88,6 +88,79 @@ static void __iomem *cns3xxx_pci_cfg_bas
- 	return base + (where & 0xffc) + (devfn << 12);
- }
- 
-+static inline int check_master_abort(struct pci_bus *bus, unsigned int devfn, int where)
-+{
-+	struct cns3xxx_pcie *cnspci = pbus_to_cnspci(bus);
-+
-+  /* check PCI-compatible status register after access */
-+	if (cnspci->linked) {
-+		void __iomem *host_base;
-+		u32 sreg, ereg;
-+
-+		host_base = (void __iomem *) cnspci->cfg_bases[CNS3XXX_HOST_TYPE].virtual;
-+		sreg = __raw_readw(host_base + 0x6) & 0xF900;
-+		ereg = __raw_readl(host_base + 0x104); // Uncorrectable Error Status Reg
-+
-+		if (sreg | ereg) {
-+			/* SREG:
-+			 *  BIT15 - Detected Parity Error
-+			 *  BIT14 - Signaled System Error
-+			 *  BIT13 - Received Master Abort
-+			 *  BIT12 - Received Target Abort
-+			 *  BIT11 - Signaled Target Abort
-+			 *  BIT08 - Master Data Parity Error
-+			 *
-+			 * EREG:
-+			 *  BIT20 - Unsupported Request
-+			 *  BIT19 - ECRC
-+			 *  BIT18 - Malformed TLP
-+			 *  BIT17 - Receiver Overflow
-+			 *  BIT16 - Unexpected Completion
-+			 *  BIT15 - Completer Abort
-+			 *  BIT14 - Completion Timeout
-+			 *  BIT13 - Flow Control Protocol Error
-+			 *  BIT12 - Poisoned TLP
-+			 *  BIT04 - Data Link Protocol Error
-+			 *
-+			 * TODO: see Documentation/pci-error-recovery.txt
-+			 *    implement error_detected handler
-+			 */
-+/*
-+			printk("pci error: %04d:%02x:%02x.%02x sreg=0x%04x ereg=0x%08x", pci_domain_nr(bus), bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), sreg, ereg);
-+			if (sreg & BIT(15)) printk(" <PERR");
-+			if (sreg & BIT(14)) printk(" >SERR");
-+			if (sreg & BIT(13)) printk(" <MABRT");
-+			if (sreg & BIT(12)) printk(" <TABRT");
-+			if (sreg & BIT(11)) printk(" >TABRT");
-+			if (sreg & BIT( 8)) printk(" MPERR");
-+
-+			if (ereg & BIT(20)) printk(" Unsup");
-+			if (ereg & BIT(19)) printk(" ECRC");
-+			if (ereg & BIT(18)) printk(" MTLP");
-+			if (ereg & BIT(17)) printk(" OFLOW");
-+			if (ereg & BIT(16)) printk(" Unex");
-+			if (ereg & BIT(15)) printk(" ABRT");
-+			if (ereg & BIT(14)) printk(" COMPTO");
-+			if (ereg & BIT(13)) printk(" FLOW");
-+			if (ereg & BIT(12)) printk(" PTLP");
-+			if (ereg & BIT( 4)) printk(" DLINK");
-+			printk("\n");
-+*/
-+			pr_debug("%s failed port%d sreg=0x%04x\n", __func__,
-+				cnspci->hw_pci.domain, sreg);
-+
-+			/* make sure the status bits are reset */
-+			__raw_writew(sreg, host_base + 6);
-+			__raw_writel(ereg, host_base + 0x104);
-+			return 1;
-+		}
-+	}
-+	else
-+		return 1;
-+
-+  return 0;
-+}
-+
- static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
- 				   int where, int size, u32 *val)
- {
-@@ -104,6 +177,11 @@ static int cns3xxx_pci_read_config(struc
- 
- 	v = __raw_readl(base);
- 
-+	if (check_master_abort(bus, devfn, where)) {
-+		printk(KERN_ERR "pci error: %04d:%02x:%02x.%02x %02x(%d)= master_abort on read\n", pci_domain_nr(bus), bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), where, size);
-+		return PCIBIOS_DEVICE_NOT_FOUND;
-+	}
-+
- 	if (bus->number == 0 && devfn == 0 &&
- 			(where & 0xffc) == PCI_CLASS_REVISION) {
- 		/*
-@@ -133,11 +211,19 @@ static int cns3xxx_pci_write_config(stru
- 		return PCIBIOS_SUCCESSFUL;
- 
- 	v = __raw_readl(base);
-+	if (check_master_abort(bus, devfn, where)) {
-+		printk(KERN_ERR "pci error: %04d:%02x:%02x.%02x %02x(%d)=0x%08x master_abort on read\n", pci_domain_nr(bus), bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), where, size, val);
-+		return PCIBIOS_DEVICE_NOT_FOUND;
-+	}
- 
- 	v &= ~(mask << shift);
- 	v |= (val & mask) << shift;
- 
- 	__raw_writel(v, base);
-+	if (check_master_abort(bus, devfn, where)) {
-+		printk(KERN_ERR "pci error: %04d:%02x:%02x.%02x %02x(%d)=0x%08x master_abort on write\n", pci_domain_nr(bus), bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), where, size, val);
-+		return PCIBIOS_DEVICE_NOT_FOUND;
-+	}
- 
- 	return PCIBIOS_SUCCESSFUL;
- }
-@@ -315,8 +401,14 @@ static void __init cns3xxx_pcie_hw_init(
- static int cns3xxx_pcie_abort_handler(unsigned long addr, unsigned int fsr,
- 				      struct pt_regs *regs)
- {
-+#if 0
-+/* R14_ABORT = PC+4 for XSCALE but not ARM11MPCORE
-+ * ignore imprecise aborts and use PCI-compatible Status register to
-+ * determine errors instead
-+ */
- 	if (fsr & (1 << 10))
- 		regs->ARM_pc += 4;
-+#endif
- 	return 0;
- }
- 
diff --git a/target/linux/cns3xxx/patches-3.18/065-pcie_skip_inactive.patch b/target/linux/cns3xxx/patches-3.18/065-pcie_skip_inactive.patch
deleted file mode 100644
index 837fc87d2d..0000000000
--- a/target/linux/cns3xxx/patches-3.18/065-pcie_skip_inactive.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- a/arch/arm/mach-cns3xxx/pcie.c
-+++ b/arch/arm/mach-cns3xxx/pcie.c
-@@ -424,6 +424,8 @@ void __init cns3xxx_pcie_init_late(void)
- 
- 	for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
- 		cns3xxx_pcie_check_link(&cns3xxx_pcie[i]);
-+		if (!cns3xxx_pcie[i].linked)
-+			continue;
- 		cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]);
- 		pci_common_init(&cns3xxx_pcie[i].hw_pci);
- 	}
diff --git a/target/linux/cns3xxx/patches-3.18/070-i2c_support.patch b/target/linux/cns3xxx/patches-3.18/070-i2c_support.patch
deleted file mode 100644
index ff6be6a1ba..0000000000
--- a/target/linux/cns3xxx/patches-3.18/070-i2c_support.patch
+++ /dev/null
@@ -1,31 +0,0 @@
---- a/drivers/i2c/busses/Kconfig
-+++ b/drivers/i2c/busses/Kconfig
-@@ -417,6 +417,18 @@ config I2C_CBUS_GPIO
- 	  This driver can also be built as a module.  If so, the module
- 	  will be called i2c-cbus-gpio.
- 
-+config I2C_CNS3XXX
-+	tristate "Cavium CNS3xxx I2C driver"
-+	depends on ARCH_CNS3XXX
-+	help
-+	  Support for Cavium CNS3xxx I2C controller driver.
-+
-+	  This driver can also be built as a module.  If so, the module
-+	  will be called i2c-cns3xxx.
-+
-+	  Please note that this driver might be needed to bring up other
-+	  devices such as Cavium CNS3xxx Ethernet.
-+
- config I2C_CPM
- 	tristate "Freescale CPM1 or CPM2 (MPC8xx/826x)"
- 	depends on CPM1 || CPM2
---- a/drivers/i2c/busses/Makefile
-+++ b/drivers/i2c/busses/Makefile
-@@ -101,6 +101,7 @@ obj-$(CONFIG_I2C_CROS_EC_TUNNEL)	+= i2c-
- obj-$(CONFIG_I2C_ELEKTOR)	+= i2c-elektor.o
- obj-$(CONFIG_I2C_PCA_ISA)	+= i2c-pca-isa.o
- obj-$(CONFIG_I2C_SIBYTE)	+= i2c-sibyte.o
-+obj-$(CONFIG_I2C_CNS3XXX)	+= i2c-cns3xxx.o
- obj-$(CONFIG_SCx200_ACB)	+= scx200_acb.o
- 
- ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG
diff --git a/target/linux/cns3xxx/patches-3.18/075-spi_support.patch b/target/linux/cns3xxx/patches-3.18/075-spi_support.patch
deleted file mode 100644
index da6dcd490e..0000000000
--- a/target/linux/cns3xxx/patches-3.18/075-spi_support.patch
+++ /dev/null
@@ -1,55 +0,0 @@
---- a/drivers/spi/Kconfig
-+++ b/drivers/spi/Kconfig
-@@ -171,6 +171,13 @@ config SPI_CLPS711X
- 	  This enables dedicated general purpose SPI/Microwire1-compatible
- 	  master mode interface (SSI1) for CLPS711X-based CPUs.
- 
-+config SPI_CNS3XXX
-+	tristate "CNS3XXX SPI controller"
-+	depends on ARCH_CNS3XXX && SPI_MASTER
-+	select SPI_BITBANG
-+	help
-+	  This enables using the CNS3XXX SPI controller in master mode.
-+
- config SPI_COLDFIRE_QSPI
- 	tristate "Freescale Coldfire QSPI controller"
- 	depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x)
---- a/drivers/spi/Makefile
-+++ b/drivers/spi/Makefile
-@@ -25,6 +25,7 @@ obj-$(CONFIG_SPI_BITBANG)		+= spi-bitban
- obj-$(CONFIG_SPI_BUTTERFLY)		+= spi-butterfly.o
- obj-$(CONFIG_SPI_CADENCE)		+= spi-cadence.o
- obj-$(CONFIG_SPI_CLPS711X)		+= spi-clps711x.o
-+obj-$(CONFIG_SPI_CNS3XXX)		+= spi-cns3xxx.o
- obj-$(CONFIG_SPI_COLDFIRE_QSPI)		+= spi-coldfire-qspi.o
- obj-$(CONFIG_SPI_DAVINCI)		+= spi-davinci.o
- obj-$(CONFIG_SPI_DESIGNWARE)		+= spi-dw.o
---- a/drivers/spi/spi-bitbang.c
-+++ b/drivers/spi/spi-bitbang.c
-@@ -335,6 +335,10 @@ static int spi_bitbang_transfer_one(stru
- 			 */
- 			if (!m->is_dma_mapped)
- 				t->rx_dma = t->tx_dma = 0;
-+
-+			t->last_in_message_list =
-+				list_is_last(&t->transfer_list, &m->transfers);
-+
- 			status = bitbang->txrx_bufs(spi, t);
- 		}
- 		if (status > 0)
---- a/include/linux/spi/spi.h
-+++ b/include/linux/spi/spi.h
-@@ -630,6 +630,13 @@ struct spi_transfer {
- 	u32		speed_hz;
- 
- 	struct list_head transfer_list;
-+
-+#ifdef CONFIG_ARCH_CNS3XXX
-+	unsigned	last_in_message_list;
-+#ifdef CONFIG_SPI_CNS3XXX_2IOREAD
-+	u8	dio_read;
-+#endif
-+#endif
- };
- 
- /**
diff --git a/target/linux/cns3xxx/patches-3.18/080-sata_support.patch b/target/linux/cns3xxx/patches-3.18/080-sata_support.patch
deleted file mode 100644
index c619787864..0000000000
--- a/target/linux/cns3xxx/patches-3.18/080-sata_support.patch
+++ /dev/null
@@ -1,26 +0,0 @@
---- a/drivers/ata/ahci_platform.c
-+++ b/drivers/ata/ahci_platform.c
-@@ -29,12 +29,23 @@ static const struct ata_port_info ahci_p
- 	.port_ops	= &ahci_platform_ops,
- };
- 
-+static const struct ata_port_info cns3xxx_port_info = {
-+	.flags		= AHCI_FLAG_COMMON,
-+	.pio_mask	= ATA_PIO4,
-+	.udma_mask	= ATA_UDMA6,
-+	.port_ops	= &ahci_pmp_retry_srst_ops,
-+};
-+
- static int ahci_probe(struct platform_device *pdev)
- {
- 	struct device *dev = &pdev->dev;
- 	struct ahci_host_priv *hpriv;
-+	const struct ata_port_info *info = &ahci_port_info;
- 	int rc;
- 
-+	if (IS_ENABLED(CONFIG_ARCH_CNS3XXX))
-+		info = &cns3xxx_port_info;
-+
- 	hpriv = ahci_platform_get_resources(pdev);
- 	if (IS_ERR(hpriv))
- 		return PTR_ERR(hpriv);
diff --git a/target/linux/cns3xxx/patches-3.18/085-ethernet_support.patch b/target/linux/cns3xxx/patches-3.18/085-ethernet_support.patch
deleted file mode 100644
index 258423a7f6..0000000000
--- a/target/linux/cns3xxx/patches-3.18/085-ethernet_support.patch
+++ /dev/null
@@ -1,20 +0,0 @@
---- a/drivers/net/ethernet/Kconfig
-+++ b/drivers/net/ethernet/Kconfig
-@@ -34,6 +34,7 @@ source "drivers/net/ethernet/adi/Kconfig
- source "drivers/net/ethernet/broadcom/Kconfig"
- source "drivers/net/ethernet/brocade/Kconfig"
- source "drivers/net/ethernet/calxeda/Kconfig"
-+source "drivers/net/ethernet/cavium/Kconfig"
- source "drivers/net/ethernet/chelsio/Kconfig"
- source "drivers/net/ethernet/cirrus/Kconfig"
- source "drivers/net/ethernet/cisco/Kconfig"
---- a/drivers/net/ethernet/Makefile
-+++ b/drivers/net/ethernet/Makefile
-@@ -20,6 +20,7 @@ obj-$(CONFIG_NET_BFIN) += adi/
- obj-$(CONFIG_NET_VENDOR_BROADCOM) += broadcom/
- obj-$(CONFIG_NET_VENDOR_BROCADE) += brocade/
- obj-$(CONFIG_NET_CALXEDA_XGMAC) += calxeda/
-+obj-$(CONFIG_NET_VENDOR_CAVIUM) += cavium/
- obj-$(CONFIG_NET_VENDOR_CHELSIO) += chelsio/
- obj-$(CONFIG_NET_VENDOR_CIRRUS) += cirrus/
- obj-$(CONFIG_NET_VENDOR_CISCO) += cisco/
diff --git a/target/linux/cns3xxx/patches-3.18/090-timers.patch b/target/linux/cns3xxx/patches-3.18/090-timers.patch
deleted file mode 100644
index 0bf686d22f..0000000000
--- a/target/linux/cns3xxx/patches-3.18/090-timers.patch
+++ /dev/null
@@ -1,104 +0,0 @@
---- a/arch/arm/mach-cns3xxx/core.c
-+++ b/arch/arm/mach-cns3xxx/core.c
-@@ -135,12 +135,13 @@ static void cns3xxx_timer_set_mode(enum
- 
- 	switch (mode) {
- 	case CLOCK_EVT_MODE_PERIODIC:
--		reload = pclk * 20 / (3 * HZ) * 0x25000;
-+		reload = pclk * 1000000 / HZ;
- 		writel(reload, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET);
- 		ctrl |= (1 << 0) | (1 << 2) | (1 << 9);
- 		break;
- 	case CLOCK_EVT_MODE_ONESHOT:
- 		/* period set, and timer enabled in 'next_event' hook */
-+		writel(0, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET);
- 		ctrl |= (1 << 2) | (1 << 9);
- 		break;
- 	case CLOCK_EVT_MODE_UNUSED:
-@@ -168,7 +169,7 @@ static struct clock_event_device cns3xxx
- 	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
- 	.set_mode	= cns3xxx_timer_set_mode,
- 	.set_next_event	= cns3xxx_timer_set_next_event,
--	.rating		= 350,
-+	.rating		= 300,
- 	.cpumask	= cpu_all_mask,
- };
- 
-@@ -213,6 +214,35 @@ static void __init cns3xxx_init_twd(void
- 	twd_local_timer_register(&cns3xx_twd_local_timer);
- }
- 
-+static cycle_t cns3xxx_get_cycles(struct clocksource *cs)
-+{
-+  u64 val;
-+
-+  val = readl(cns3xxx_tmr1 + TIMER_FREERUN_CONTROL_OFFSET);
-+  val &= 0xffff;
-+
-+  return ((val << 32) | readl(cns3xxx_tmr1 + TIMER_FREERUN_OFFSET));
-+}
-+
-+static struct clocksource clocksource_cns3xxx = {
-+	.name = "freerun",
-+	.rating = 200,
-+	.read = cns3xxx_get_cycles,
-+	.mask = CLOCKSOURCE_MASK(48),
-+	.shift  = 16,
-+	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
-+};
-+
-+static void __init cns3xxx_clocksource_init(void)
-+{
-+	/* Reset the FreeRunning counter */
-+	writel((1 << 16), cns3xxx_tmr1 + TIMER_FREERUN_CONTROL_OFFSET);
-+
-+	clocksource_cns3xxx.mult =
-+		clocksource_khz2mult(100, clocksource_cns3xxx.shift);
-+	clocksource_register(&clocksource_cns3xxx);
-+}
-+
- /*
-  * Set up the clock source and clock events devices
-  */
-@@ -230,13 +260,12 @@ static void __init __cns3xxx_timer_init(
- 	/* stop free running timer3 */
- 	writel(0, cns3xxx_tmr1 + TIMER_FREERUN_CONTROL_OFFSET);
- 
--	/* timer1 */
--	writel(0x5C800, cns3xxx_tmr1 + TIMER1_COUNTER_OFFSET);
--	writel(0x5C800, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET);
--
- 	writel(0, cns3xxx_tmr1 + TIMER1_MATCH_V1_OFFSET);
- 	writel(0, cns3xxx_tmr1 + TIMER1_MATCH_V2_OFFSET);
- 
-+	val = (cns3xxx_cpu_clock() >> 3) * 1000000 / HZ;
-+	writel(val, cns3xxx_tmr1 + TIMER1_COUNTER_OFFSET);
-+
- 	/* mask irq, non-mask timer1 overflow */
- 	irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET);
- 	irq_mask &= ~(1 << 2);
-@@ -248,23 +277,9 @@ static void __init __cns3xxx_timer_init(
- 	val |= (1 << 9);
- 	writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
- 
--	/* timer2 */
--	writel(0, cns3xxx_tmr1 + TIMER2_MATCH_V1_OFFSET);
--	writel(0, cns3xxx_tmr1 + TIMER2_MATCH_V2_OFFSET);
--
--	/* mask irq */
--	irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET);
--	irq_mask |= ((1 << 3) | (1 << 4) | (1 << 5));
--	writel(irq_mask, cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET);
--
--	/* down counter */
--	val = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
--	val |= (1 << 10);
--	writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
--
--	/* Make irqs happen for the system timer */
- 	setup_irq(timer_irq, &cns3xxx_timer_irq);
- 
-+	cns3xxx_clocksource_init();
- 	cns3xxx_clockevents_init(timer_irq);
- 	cns3xxx_init_twd();
- }
diff --git a/target/linux/cns3xxx/patches-3.18/095-gpio_support.patch b/target/linux/cns3xxx/patches-3.18/095-gpio_support.patch
deleted file mode 100644
index 79a937a606..0000000000
--- a/target/linux/cns3xxx/patches-3.18/095-gpio_support.patch
+++ /dev/null
@@ -1,67 +0,0 @@
---- a/arch/arm/mach-cns3xxx/cns3420vb.c
-+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
-@@ -245,6 +245,10 @@ static void __init cns3420_init(void)
- 
- 	cns3xxx_ahci_init();
- 	cns3xxx_sdhci_init();
-+	cns3xxx_gpio_init( 0, 32, CNS3XXX_GPIOA_BASE_VIRT, IRQ_CNS3XXX_GPIOA,
-+		NR_IRQS_CNS3XXX);
-+	cns3xxx_gpio_init(32, 32, CNS3XXX_GPIOB_BASE_VIRT, IRQ_CNS3XXX_GPIOB,
-+		NR_IRQS_CNS3XXX + 32);
- 
- 	pm_power_off = cns3xxx_power_off;
- }
---- a/arch/arm/mach-cns3xxx/Kconfig
-+++ b/arch/arm/mach-cns3xxx/Kconfig
-@@ -1,6 +1,8 @@
- menuconfig ARCH_CNS3XXX
- 	bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6
- 	select ARM_GIC
-+	select ARCH_REQUIRE_GPIOLIB
-+	select GENERIC_IRQ_CHIP
- 	select PCI_DOMAINS if PCI
- 	select HAVE_ARM_SCU if SMP
- 	select HAVE_ARM_TWD
---- a/arch/arm/mach-cns3xxx/Makefile
-+++ b/arch/arm/mach-cns3xxx/Makefile
-@@ -1,7 +1,7 @@
- ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
- 
- obj-$(CONFIG_ARCH_CNS3XXX)		+= cns3xxx.o
--cns3xxx-y				+= core.o pm.o
-+cns3xxx-y				+= core.o pm.o gpio.o
- cns3xxx-$(CONFIG_ATAGS)			+= devices.o
- cns3xxx-$(CONFIG_PCI)			+= pcie.o
- cns3xxx-$(CONFIG_MACH_CNS3420VB)	+= cns3420vb.o
---- a/arch/arm/mach-cns3xxx/cns3xxx.h
-+++ b/arch/arm/mach-cns3xxx/cns3xxx.h
-@@ -68,8 +68,10 @@
- #define SMC_PCELL_ID_3_OFFSET			0xFFC
- 
- #define CNS3XXX_GPIOA_BASE			0x74000000	/* GPIO port A */
-+#define CNS3XXX_GPIOA_BASE_VIRT			0xFB006000
- 
- #define CNS3XXX_GPIOB_BASE			0x74800000	/* GPIO port B */
-+#define CNS3XXX_GPIOB_BASE_VIRT			0xFB007000
- 
- #define CNS3XXX_RTC_BASE			0x75000000	/* Real Time Clock */
- 
---- a/arch/arm/mach-cns3xxx/core.c
-+++ b/arch/arm/mach-cns3xxx/core.c
-@@ -50,6 +50,16 @@ static struct map_desc cns3xxx_io_desc[]
- 		.pfn		= __phys_to_pfn(CNS3XXX_PM_BASE),
- 		.length		= SZ_4K,
- 		.type		= MT_DEVICE,
-+	}, {
-+		.virtual	= CNS3XXX_GPIOA_BASE_VIRT,
-+		.pfn		= __phys_to_pfn(CNS3XXX_GPIOA_BASE),
-+		.length		= SZ_4K,
-+		.type		= MT_DEVICE,
-+	}, {
-+		.virtual	= CNS3XXX_GPIOB_BASE_VIRT,
-+		.pfn		= __phys_to_pfn(CNS3XXX_GPIOB_BASE),
-+		.length		= SZ_4K,
-+		.type		= MT_DEVICE,
- #ifdef CONFIG_PCI
- 	}, {
- 		.virtual	= CNS3XXX_PCIE0_HOST_BASE_VIRT,
diff --git a/target/linux/cns3xxx/patches-3.18/097-l2x0_cmdline_disable.patch b/target/linux/cns3xxx/patches-3.18/097-l2x0_cmdline_disable.patch
deleted file mode 100644
index da49e20604..0000000000
--- a/target/linux/cns3xxx/patches-3.18/097-l2x0_cmdline_disable.patch
+++ /dev/null
@@ -1,69 +0,0 @@
---- a/arch/arm/mach-cns3xxx/core.c
-+++ b/arch/arm/mach-cns3xxx/core.c
-@@ -303,13 +303,26 @@ void __init cns3xxx_timer_init(void)
- 
- #ifdef CONFIG_CACHE_L2X0
- 
--void __init cns3xxx_l2x0_init(void)
-+static int cns3xxx_l2x0_enable = 1;
-+
-+static int __init cns3xxx_l2x0_disable(char *s)
-+{
-+	cns3xxx_l2x0_enable = 0;
-+	return 1;
-+}
-+__setup("nol2x0", cns3xxx_l2x0_disable);
-+
-+static int __init cns3xxx_l2x0_init(void)
- {
--	void __iomem *base = ioremap(CNS3XXX_L2C_BASE, SZ_4K);
-+	void __iomem *base;
- 	u32 val;
- 
-+	if (!cns3xxx_l2x0_enable)
-+		return 0;
-+
-+	base = ioremap(CNS3XXX_L2C_BASE, SZ_4K);
- 	if (WARN_ON(!base))
--		return;
-+		return 0;
- 
- 	/*
- 	 * Tag RAM Control register
-@@ -339,7 +352,10 @@ void __init cns3xxx_l2x0_init(void)
- 
- 	/* 32 KiB, 8-way, parity disable */
- 	l2x0_init(base, 0x00500000, 0xfe0f0fff);
-+
-+	return 0;
- }
-+arch_initcall(cns3xxx_l2x0_init);
- 
- #endif /* CONFIG_CACHE_L2X0 */
- 
---- a/arch/arm/mach-cns3xxx/cns3420vb.c
-+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
-@@ -239,8 +239,6 @@ static struct platform_device *cns3420_p
- 
- static void __init cns3420_init(void)
- {
--	cns3xxx_l2x0_init();
--
- 	platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs));
- 
- 	cns3xxx_ahci_init();
---- a/arch/arm/mach-cns3xxx/core.h
-+++ b/arch/arm/mach-cns3xxx/core.h
-@@ -16,12 +16,6 @@
- extern struct smp_operations cns3xxx_smp_ops;
- extern void cns3xxx_timer_init(void);
- 
--#ifdef CONFIG_CACHE_L2X0
--void __init cns3xxx_l2x0_init(void);
--#else
--static inline void cns3xxx_l2x0_init(void) {}
--#endif /* CONFIG_CACHE_L2X0 */
--
- #ifdef CONFIG_PCI
- extern void __init cns3xxx_pcie_init_late(void);
- #else
diff --git a/target/linux/cns3xxx/patches-3.18/100-laguna_support.patch b/target/linux/cns3xxx/patches-3.18/100-laguna_support.patch
deleted file mode 100644
index 3c0bba4316..0000000000
--- a/target/linux/cns3xxx/patches-3.18/100-laguna_support.patch
+++ /dev/null
@@ -1,46 +0,0 @@
---- a/arch/arm/mach-cns3xxx/Kconfig
-+++ b/arch/arm/mach-cns3xxx/Kconfig
-@@ -22,4 +22,12 @@ config MACH_CNS3420VB
- 	  This is a platform with an on-board ARM11 MPCore and has support
- 	  for USB, USB-OTG, MMC/SD/SDIO, SATA, PCI-E, etc.
- 
-+config MACH_GW2388
-+	bool "Support for Gateworks Laguna Platform"
-+	help
-+	  Include support for the Gateworks Laguna Platform
-+
-+	  This is a platform with an on-board ARM11 MPCore and has support
-+	  for USB, USB-OTG, MMC/SD/SDIO, SATA, PCI-E, I2C, GIG, etc.
-+
- endif
---- a/arch/arm/mach-cns3xxx/Makefile
-+++ b/arch/arm/mach-cns3xxx/Makefile
-@@ -7,3 +7,5 @@ cns3xxx-$(CONFIG_PCI)			+= pcie.o
- cns3xxx-$(CONFIG_MACH_CNS3420VB)	+= cns3420vb.o
- cns3xxx-$(CONFIG_SMP)			+= platsmp.o headsmp.o cns3xxx_fiq.o
- cns3xxx-$(CONFIG_HOTPLUG_CPU)		+= hotplug.o
-+cns3xxx-$(CONFIG_MACH_GW2388)		+= laguna.o
-+
---- a/arch/arm/mach-cns3xxx/devices.c
-+++ b/arch/arm/mach-cns3xxx/devices.c
-@@ -16,6 +16,7 @@
- #include <linux/compiler.h>
- #include <linux/dma-mapping.h>
- #include <linux/platform_device.h>
-+#include <asm/mach-types.h>
- #include "cns3xxx.h"
- #include "pm.h"
- #include "core.h"
-@@ -101,7 +102,11 @@ void __init cns3xxx_sdhci_init(void)
- 	u32 gpioa_pins = __raw_readl(gpioa);
- 
- 	/* MMC/SD pins share with GPIOA */
--	gpioa_pins |= 0x1fff0004;
-+	if (machine_is_gw2388()) {
-+		gpioa_pins |= 0x1fff0000;
-+	} else {
-+		gpioa_pins |= 0x1fff0004;
-+	}
- 	__raw_writel(gpioa_pins, gpioa);
- 
- 	cns3xxx_pwr_clk_en(CNS3XXX_PWR_CLK_EN(SDIO));
diff --git a/target/linux/cns3xxx/patches-3.18/101-laguna_sdhci_card_detect.patch b/target/linux/cns3xxx/patches-3.18/101-laguna_sdhci_card_detect.patch
deleted file mode 100644
index 72648a5f9f..0000000000
--- a/target/linux/cns3xxx/patches-3.18/101-laguna_sdhci_card_detect.patch
+++ /dev/null
@@ -1,14 +0,0 @@
---- a/drivers/mmc/host/sdhci-cns3xxx.c
-+++ b/drivers/mmc/host/sdhci-cns3xxx.c
-@@ -88,9 +88,9 @@ static const struct sdhci_pltfm_data sdh
- 	.ops = &sdhci_cns3xxx_ops,
- 	.quirks = SDHCI_QUIRK_BROKEN_DMA |
- 		  SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
--		  SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
- 		  SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
--		  SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
-+		  SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
-+		  SDHCI_QUIRK_BROKEN_CARD_DETECTION,
- };
- 
- static int sdhci_cns3xxx_probe(struct platform_device *pdev)
diff --git a/target/linux/cns3xxx/patches-3.18/110-pci_isolated_interrupts.patch b/target/linux/cns3xxx/patches-3.18/110-pci_isolated_interrupts.patch
deleted file mode 100644
index b7e07ff22a..0000000000
--- a/target/linux/cns3xxx/patches-3.18/110-pci_isolated_interrupts.patch
+++ /dev/null
@@ -1,188 +0,0 @@
---- a/arch/arm/mach-cns3xxx/laguna.c
-+++ b/arch/arm/mach-cns3xxx/laguna.c
-@@ -21,6 +21,7 @@
- #include <linux/kernel.h>
- #include <linux/compiler.h>
- #include <linux/io.h>
-+#include <linux/irq.h>
- #include <linux/gpio.h>
- #include <linux/dma-mapping.h>
- #include <linux/serial_core.h>
-@@ -872,6 +873,47 @@ static int laguna_register_gpio(struct g
- 	return ret;
- }
- 
-+/* allow disabling of external isolated PCIe IRQs */
-+static int cns3xxx_pciextirq = 1;
-+static int __init cns3xxx_pciextirq_disable(char *s)
-+{
-+      cns3xxx_pciextirq = 0;
-+      return 1;
-+}
-+__setup("noextirq", cns3xxx_pciextirq_disable);
-+
-+static int __init laguna_pcie_init_irq(void)
-+{
-+	u32 __iomem *mem = (void __iomem *)(CNS3XXX_GPIOB_BASE_VIRT + 0x0004);
-+	u32 reg = (__raw_readl(mem) >> 26) & 0xf;
-+	int irqs[] = {
-+		IRQ_CNS3XXX_EXTERNAL_PIN0,
-+		IRQ_CNS3XXX_EXTERNAL_PIN1,
-+		IRQ_CNS3XXX_EXTERNAL_PIN2,
-+		154,
-+	};
-+
-+	if (!machine_is_gw2388())
-+		return 0;
-+
-+	/* Verify GPIOB[26:29] == 0001b indicating support for ext irqs */
-+	if (cns3xxx_pciextirq && reg != 1)
-+		cns3xxx_pciextirq = 0;
-+
-+	if (cns3xxx_pciextirq) {
-+		printk("laguna: using isolated PCI interrupts:"
-+		       " irq%d/irq%d/irq%d/irq%d\n",
-+		       irqs[0], irqs[1], irqs[2], irqs[3]);
-+		cns3xxx_pcie_set_irqs(0, irqs);
-+	} else {
-+		printk("laguna: using shared PCI interrupts: irq%d\n",
-+		       IRQ_CNS3XXX_PCIE0_DEVICE);
-+	}
-+
-+	return 0;
-+}
-+subsys_initcall(laguna_pcie_init_irq);
-+
- static int __init laguna_model_setup(void)
- {
- 	u32 __iomem *mem;
-@@ -883,8 +925,33 @@ static int __init laguna_model_setup(voi
- 	printk("Running on Gateworks Laguna %s\n", laguna_info.model);
- 	cns3xxx_gpio_init( 0, 32, CNS3XXX_GPIOA_BASE_VIRT, IRQ_CNS3XXX_GPIOA,
- 		NR_IRQS_CNS3XXX);
--	cns3xxx_gpio_init(32, 32, CNS3XXX_GPIOB_BASE_VIRT, IRQ_CNS3XXX_GPIOB,
--		NR_IRQS_CNS3XXX + 32);
-+
-+	/*
-+	 * If pcie external interrupts are supported and desired
-+	 * configure IRQ types and configure pin function.
-+	 * Note that cns3xxx_pciextirq is enabled by default, but can be
-+	 * unset via the 'noextirq' kernel param or by laguna_pcie_init() if
-+	 * the baseboard model does not support this hardware feature.
-+	 */
-+	if (cns3xxx_pciextirq) {
-+		mem = (void __iomem *)(CNS3XXX_MISC_BASE_VIRT + 0x0018);
-+		reg = __raw_readl(mem);
-+		/* GPIO26 is gpio, EXT_INT[0:2] not gpio func */
-+		reg &= ~0x3c000000;
-+		reg |= 0x38000000;
-+		__raw_writel(reg, mem);
-+
-+		cns3xxx_gpio_init(32, 32, CNS3XXX_GPIOB_BASE_VIRT,
-+				  IRQ_CNS3XXX_GPIOB, NR_IRQS_CNS3XXX + 32);
-+
-+		irq_set_irq_type(154, IRQ_TYPE_LEVEL_LOW);
-+		irq_set_irq_type(93, IRQ_TYPE_LEVEL_HIGH);
-+		irq_set_irq_type(94, IRQ_TYPE_LEVEL_HIGH);
-+		irq_set_irq_type(95, IRQ_TYPE_LEVEL_HIGH);
-+	} else {
-+		cns3xxx_gpio_init(32, 32, CNS3XXX_GPIOB_BASE_VIRT,
-+				  IRQ_CNS3XXX_GPIOB, NR_IRQS_CNS3XXX + 32);
-+	}
- 
- 	if (strncmp(laguna_info.model, "GW", 2) == 0) {
- 		if (laguna_info.config_bitmap & ETH0_LOAD)
---- a/arch/arm/mach-cns3xxx/pcie.c
-+++ b/arch/arm/mach-cns3xxx/pcie.c
-@@ -18,6 +18,7 @@
- #include <linux/io.h>
- #include <linux/ioport.h>
- #include <linux/interrupt.h>
-+#include <linux/irq.h>
- #include <linux/ptrace.h>
- #include <asm/mach/map.h>
- #include "cns3xxx.h"
-@@ -27,7 +28,7 @@ struct cns3xxx_pcie {
- 	void __iomem *host_regs; /* PCI config registers for host bridge */
- 	void __iomem *cfg0_regs; /* PCI Type 0 config registers */
- 	void __iomem *cfg1_regs; /* PCI Type 1 config registers */
--	unsigned int irqs[2];
-+	unsigned int irqs[5];
- 	struct resource res_io;
- 	struct resource res_mem;
- 	struct hw_pci hw_pci;
-@@ -97,7 +98,7 @@ static inline int check_master_abort(str
- 		void __iomem *host_base;
- 		u32 sreg, ereg;
- 
--		host_base = (void __iomem *) cnspci->cfg_bases[CNS3XXX_HOST_TYPE].virtual;
-+		host_base = (void __iomem *) cnspci->host_regs;
- 		sreg = __raw_readw(host_base + 0x6) & 0xF900;
- 		ereg = __raw_readl(host_base + 0x104); // Uncorrectable Error Status Reg
- 
-@@ -251,7 +252,7 @@ static struct pci_ops cns3xxx_pcie_ops =
- static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
- {
- 	struct cns3xxx_pcie *cnspci = pdev_to_cnspci(dev);
--	int irq = cnspci->irqs[!!dev->bus->number];
-+	int irq = cnspci->irqs[!!dev->bus->number + pin - 1];
- 
- 	pr_info("PCIe map irq: %04d:%02x:%02x.%02x slot %d, pin %d, irq: %d\n",
- 		pci_domain_nr(dev->bus), dev->bus->number, PCI_SLOT(dev->devfn),
-@@ -277,7 +278,12 @@ static struct cns3xxx_pcie cns3xxx_pcie[
- 			.end = CNS3XXX_PCIE0_HOST_BASE - 1, /* 176 MiB */
- 			.flags = IORESOURCE_MEM,
- 		},
--		.irqs = { IRQ_CNS3XXX_PCIE0_RC, IRQ_CNS3XXX_PCIE0_DEVICE, },
-+		.irqs = { IRQ_CNS3XXX_PCIE0_RC,
-+			  IRQ_CNS3XXX_PCIE0_DEVICE,
-+			  IRQ_CNS3XXX_PCIE0_DEVICE,
-+			  IRQ_CNS3XXX_PCIE0_DEVICE,
-+			  IRQ_CNS3XXX_PCIE0_DEVICE,
-+			},
- 		.hw_pci = {
- 			.domain = 0,
- 			.nr_controllers = 1,
-@@ -302,7 +308,13 @@ static struct cns3xxx_pcie cns3xxx_pcie[
- 			.end = CNS3XXX_PCIE1_HOST_BASE - 1, /* 176 MiB */
- 			.flags = IORESOURCE_MEM,
- 		},
--		.irqs = { IRQ_CNS3XXX_PCIE1_RC, IRQ_CNS3XXX_PCIE1_DEVICE, },
-+		.irqs = {
-+			IRQ_CNS3XXX_PCIE1_RC,
-+			IRQ_CNS3XXX_PCIE1_DEVICE,
-+			IRQ_CNS3XXX_PCIE1_DEVICE,
-+			IRQ_CNS3XXX_PCIE1_DEVICE,
-+			IRQ_CNS3XXX_PCIE1_DEVICE,
-+		},
- 		.hw_pci = {
- 			.domain = 1,
- 			.nr_controllers = 1,
-@@ -412,6 +424,14 @@ static int cns3xxx_pcie_abort_handler(un
- 	return 0;
- }
- 
-+void __init cns3xxx_pcie_set_irqs(int bus, int *irqs)
-+{
-+	int i;
-+
-+	for (i = 0; i < 4; i++)
-+		cns3xxx_pcie[bus].irqs[i + 1] = irqs[i];
-+}
-+
- void __init cns3xxx_pcie_init_late(void)
- {
- 	int i;
---- a/arch/arm/mach-cns3xxx/core.h
-+++ b/arch/arm/mach-cns3xxx/core.h
-@@ -18,8 +18,10 @@ extern void cns3xxx_timer_init(void);
- 
- #ifdef CONFIG_PCI
- extern void __init cns3xxx_pcie_init_late(void);
-+extern void __init cns3xxx_pcie_set_irqs(int bus, int *irqs);
- #else
- static inline void __init cns3xxx_pcie_init_late(void) {}
-+static inline void cns3xxx_pcie_set_irqs(int bus, int *irqs) {}
- #endif
- 
- void __init cns3xxx_map_io(void);
diff --git a/target/linux/cns3xxx/patches-3.18/200-broadcom_phy_reinit.patch b/target/linux/cns3xxx/patches-3.18/200-broadcom_phy_reinit.patch
deleted file mode 100644
index e4cc27829e..0000000000
--- a/target/linux/cns3xxx/patches-3.18/200-broadcom_phy_reinit.patch
+++ /dev/null
@@ -1,14 +0,0 @@
---- a/drivers/net/phy/broadcom.c
-+++ b/drivers/net/phy/broadcom.c
-@@ -393,6 +393,11 @@ static int bcm5481_config_aneg(struct ph
- 		/* Write bits 14:0. */
- 		reg |= (1 << 15);
- 		phy_write(phydev, 0x18, reg);
-+	} else {
-+		phy_write(phydev, 0x18, 0xf1e7);
-+		phy_write(phydev, 0x1c, 0x8e00);
-+
-+		phy_write(phydev, 0x1c, 0xa41f);
- 	}
- 
- 	return ret;
diff --git a/target/linux/cns3xxx/patches-3.18/210-dwc2_defaults.patch b/target/linux/cns3xxx/patches-3.18/210-dwc2_defaults.patch
deleted file mode 100644
index e9c71a1d8e..0000000000
--- a/target/linux/cns3xxx/patches-3.18/210-dwc2_defaults.patch
+++ /dev/null
@@ -1,47 +0,0 @@
---- a/drivers/usb/dwc2/platform.c
-+++ b/drivers/usb/dwc2/platform.c
-@@ -105,6 +105,34 @@ static const struct dwc2_core_params par
- 	.uframe_sched			= -1,
- };
- 
-+static const struct dwc2_core_params params_cns3xxx = {
-+	.otg_cap			= 2,	/* non-HNP/non-SRP capable */
-+	.otg_ver			= 0,	/* 1.3 */
-+	.dma_enable			= 1,
-+	.dma_desc_enable		= 0,
-+	.speed				= 0,	/* High Speed */
-+	.enable_dynamic_fifo		= 1,
-+	.en_multiple_tx_fifo		= 1,
-+	.host_rx_fifo_size		= 658,	/* 774 DWORDs */
-+	.host_nperio_tx_fifo_size	= 128,	/* 256 DWORDs */
-+	.host_perio_tx_fifo_size	= 658,	/* 512 DWORDs */
-+	.max_transfer_size		= 65535,
-+	.max_packet_count		= 511,
-+	.host_channels			= 16,
-+	.phy_type			= 1,	/* UTMI */
-+	.phy_utmi_width			= 16,	/* 8 bits */
-+	.phy_ulpi_ddr			= 0,	/* Single */
-+	.phy_ulpi_ext_vbus		= 0,
-+	.i2c_enable			= 0,
-+	.ulpi_fs_ls			= 0,
-+	.host_support_fs_ls_low_power	= 0,
-+	.host_ls_low_power_phy_clk	= 0,	/* 48 MHz */
-+	.ts_dline			= 0,
-+	.reload_ctl			= 0,
-+	.ahbcfg				= 0x10,
-+	.uframe_sched			= 0,
-+};
-+
- /**
-  * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
-  * DWC_otg driver
-@@ -165,6 +193,9 @@ static int dwc2_driver_probe(struct plat
- 		/* Default all params to autodetect */
- 		dwc2_set_all_params(&defparams, -1);
- 		params = &defparams;
-+#ifdef CONFIG_ARCH_CNS3XXX
-+		params = &params_cns3xxx;
-+#endif
- 
- 		/*
- 		 * Disable descriptor dma mode by default as the HW can support