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authorJohn Crispin <john@openwrt.org>2015-03-16 07:40:41 +0000
committerJohn Crispin <john@openwrt.org>2015-03-16 07:40:41 +0000
commit518d9fd2a0bef9b05c48cebb061b6b462961b3c7 (patch)
treeef1ba97d3cf4335a441084d2dcec23317974463e /target/linux/cns3xxx/patches-3.14/030-pcie_clock.patch
parent43c66cb43416a6cac063a2b2213b79603dcc0dbf (diff)
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cns3xxx: drop 3.14 support
Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 44817
Diffstat (limited to 'target/linux/cns3xxx/patches-3.14/030-pcie_clock.patch')
-rw-r--r--target/linux/cns3xxx/patches-3.14/030-pcie_clock.patch11
1 files changed, 0 insertions, 11 deletions
diff --git a/target/linux/cns3xxx/patches-3.14/030-pcie_clock.patch b/target/linux/cns3xxx/patches-3.14/030-pcie_clock.patch
deleted file mode 100644
index 3734daf4c6..0000000000
--- a/target/linux/cns3xxx/patches-3.14/030-pcie_clock.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- a/arch/arm/mach-cns3xxx/pcie.c
-+++ b/arch/arm/mach-cns3xxx/pcie.c
-@@ -370,8 +370,6 @@ static int __init cns3xxx_pcie_init(void
- for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
- iotable_init(cns3xxx_pcie[i].cfg_bases,
- ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases));
-- cns3xxx_pwr_clk_en(0x1 << PM_CLK_GATE_REG_OFFSET_PCIE(i));
-- cns3xxx_pwr_soft_rst(0x1 << PM_SOFT_RST_REG_OFFST_PCIE(i));
- cns3xxx_pcie_check_link(&cns3xxx_pcie[i]);
- cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]);
- pci_common_init(&cns3xxx_pcie[i].hw_pci);