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authorGabor Juhos <juhosg@openwrt.org>2010-12-30 17:19:16 +0000
committerGabor Juhos <juhosg@openwrt.org>2010-12-30 17:19:16 +0000
commit72ba27ae72480d5a23b77b5760d81d4142f8181b (patch)
treee3572d5b242208667ee40cbfd0b37fc55de290e6 /target/linux/cns21xx/patches-2.6.36/102-cns21xx-gpiolib-support.patch
parenta718ebf1ed8956ec84ccd2d7f79653c0c0c74e5b (diff)
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cns21xx: add initial support for the Cavium CNS21xx SoC
SVN-Revision: 24859
Diffstat (limited to 'target/linux/cns21xx/patches-2.6.36/102-cns21xx-gpiolib-support.patch')
-rw-r--r--target/linux/cns21xx/patches-2.6.36/102-cns21xx-gpiolib-support.patch113
1 files changed, 113 insertions, 0 deletions
diff --git a/target/linux/cns21xx/patches-2.6.36/102-cns21xx-gpiolib-support.patch b/target/linux/cns21xx/patches-2.6.36/102-cns21xx-gpiolib-support.patch
new file mode 100644
index 0000000000..d54a7132cd
--- /dev/null
+++ b/target/linux/cns21xx/patches-2.6.36/102-cns21xx-gpiolib-support.patch
@@ -0,0 +1,113 @@
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -296,6 +296,8 @@ config ARCH_CNS21XX
+ select CPU_FA526
+ select PLAT_FA
+ select PLAT_FA_TIME
++ select PLAT_FA_GPIO
++ select ARCH_REQUIRE_GPIOLIB
+ select ARM_L1_CACHE_SHIFT_4
+ help
+ Support for Cavium Networks CNS21xx family.
+--- a/arch/arm/mach-cns21xx/common.h
++++ b/arch/arm/mach-cns21xx/common.h
+@@ -12,6 +12,7 @@
+
+ void __init cns21xx_map_io(void);
+ void __init cns21xx_init_irq(void);
++void __init cns21xx_gpio_init(void);
+
+ extern struct sys_timer cns21xx_timer;
+
+--- /dev/null
++++ b/arch/arm/mach-cns21xx/gpio.c
+@@ -0,0 +1,45 @@
++/*
++ * Copyright (c) 2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This file is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License, Version 2, as
++ * published by the Free Software Foundation.
++ */
++
++#include <plat/gpio.h>
++
++#include <mach/cns21xx.h>
++#include <mach/irqs.h>
++
++static struct fa_gpio_chip cns21xx_gpio_chips[] = {
++ {
++ .gpio_chip = {
++ .label = "GPIOA",
++ .base = 0,
++ .ngpio = 32,
++ },
++
++ .map_base = CNS21XX_GPIOA_BASE,
++ .irq_base = CNS21XX_GPIO_IRQ_BASE,
++ }, {
++ .gpio_chip = {
++ .label = "GPIOB",
++ .base = 32,
++ .ngpio = 32,
++ },
++
++ .map_base = CNS21XX_GPIOB_BASE,
++ .irq_base = CNS21XX_GPIO_IRQ_BASE + 32,
++ }
++};
++
++static struct fa_gpio_data cns21xx_gpio_data = {
++ .chips = cns21xx_gpio_chips,
++ .nchips = ARRAY_SIZE(cns21xx_gpio_chips),
++ .irq = CNS21XX_IRQ_GPIO,
++};
++
++void __init cns21xx_gpio_init(void)
++{
++ fa_gpio_init(&cns21xx_gpio_data);
++}
+--- /dev/null
++++ b/arch/arm/mach-cns21xx/include/mach/gpio.h
+@@ -0,0 +1,30 @@
++/*
++ * Copyright (c) 2008 Cavium Networks
++ * Copyright (c) 2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This file is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License, Version 2, as
++ * published by the Free Software Foundation.
++ */
++
++#ifndef _CNS21XX_GPIO_H
++#define _CNS21XX_GPIO_H
++
++#include <asm-generic/gpio.h>
++#include <mach/irqs.h>
++
++#define gpio_get_value __gpio_get_value
++#define gpio_set_value __gpio_set_value
++#define gpio_cansleep __gpio_cansleep
++
++static inline int gpio_to_irq(unsigned gpio)
++{
++ return (CNS21XX_GPIO_IRQ_BASE + gpio);
++}
++
++static inline int irq_to_gpio(int irq)
++{
++ return (irq - CNS21XX_GPIO_IRQ_BASE);
++}
++
++#endif /* _CNS21XX_GPIO_H */
+--- a/arch/arm/mach-cns21xx/Makefile
++++ b/arch/arm/mach-cns21xx/Makefile
+@@ -4,7 +4,7 @@
+
+ # Object file lists.
+
+-obj-y := core.o devices.o irq.o mm.o time.o
++obj-y := core.o devices.o gpio.o irq.o mm.o time.o
+
+ # machine specific files
+