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author | John Crispin <john@openwrt.org> | 2016-03-16 09:27:11 +0000 |
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committer | John Crispin <john@openwrt.org> | 2016-03-16 09:27:11 +0000 |
commit | ebcce35be48abbd948d6c50ac2d1737f4850e028 (patch) | |
tree | a1b8f238a8a8ef72b3e28eaa3e6cb2e082063e95 /target/linux/brcm63xx | |
parent | 22c5f96c6bb37b3368ca0f0c828cbe760f5c7f58 (diff) | |
download | upstream-ebcce35be48abbd948d6c50ac2d1737f4850e028.tar.gz upstream-ebcce35be48abbd948d6c50ac2d1737f4850e028.tar.bz2 upstream-ebcce35be48abbd948d6c50ac2d1737f4850e028.zip |
ar71xx: Use PHY fixups for Open Mesh MR900
The delays of PHY/MAC on the MR900 are done by u-boot and OpenWrt in
different ways. u-boot only modifies the ETH_CFG of the QCA955x based on
the link speed. But OpenWrt can only modify the PHY delays based on the
link speed.
This can lead to communication problems when u-boot initializes the ETH_CFG
for a specific link speed (e.g. 10BASE-T) but then OpenWrt the sets the PHY
delays to an incompatible value.
Instead reset the ETH_CFG delay bits of the QCA955x to a specific value and
only rely on the AT803x PHY settings.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49030
Diffstat (limited to 'target/linux/brcm63xx')
0 files changed, 0 insertions, 0 deletions