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author | Florian Fainelli <florian@openwrt.org> | 2009-06-27 16:17:18 +0000 |
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committer | Florian Fainelli <florian@openwrt.org> | 2009-06-27 16:17:18 +0000 |
commit | 79422ea7204b1ad44af63e5d4bac6f981d0a9fc4 (patch) | |
tree | a678ac7667f3fb1525cf6e6b765155d854f32811 /target/linux/brcm63xx | |
parent | ed819b628a5d1f40ec78950ea7968fba4b29ef31 (diff) | |
download | upstream-79422ea7204b1ad44af63e5d4bac6f981d0a9fc4.tar.gz upstream-79422ea7204b1ad44af63e5d4bac6f981d0a9fc4.tar.bz2 upstream-79422ea7204b1ad44af63e5d4bac6f981d0a9fc4.zip |
[brcm63xx] only register fallback sprom and enable PCI if we actually have support for PCI
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16581 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx')
-rw-r--r-- | target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c b/target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c index ff7cf56974..3e767d8a63 100644 --- a/target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c @@ -378,13 +378,13 @@ void __init board_prom_init(void) * this has to be done this early since PCI init is done * inside arch_initcall */ val = 0; - +#ifdef CONFIG_PCI if (board.has_pci) { bcm63xx_pci_enabled = 1; if (BCMCPU_IS_6348()) val |= GPIO_MODE_6348_G2_PCI; } - +#endif if (board.has_pccard) { if (BCMCPU_IS_6348()) val |= GPIO_MODE_6348_G1_MII_PCCARD; @@ -538,12 +538,14 @@ int __init board_register_devices(void) bcm63xx_udc_register(); /* Generate MAC address for WLAN and * register our SPROM */ +#ifdef CONFIG_PCI if (!board_get_mac_address(bcm63xx_sprom.il0mac)) { memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); if (ssb_arch_set_fallback_sprom(&bcm63xx_sprom) < 0) printk(KERN_ERR "failed to register fallback SPROM\n"); } +#endif /* read base address of boot chip select (0) */ val = bcm_mpi_readl(MPI_CSBASE_REG(0)); |